OpcodeStr (reference) in projects: freebsd

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Searched refs:OpcodeStr (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A D	X86InstrAVX512.td	`22 string OpcodeStr, 35 OpcodeStr#"\t{"#AttSrcAsm#", $dst\|"# 42 OpcodeStr#"\t{"#AttSrcAsm#", $dst {${mask}}\|"# 57 OpcodeStr#"\t{"#AttSrcAsm#", $dst {${mask}} {z}\|"# 68 string OpcodeStr, 78 AVX512_maskable_custom<O, F, Outs, Ins, MaskingIns, ZeroMaskingIns, OpcodeStr, 93 dag Outs, dag Ins, string OpcodeStr, 102 OpcodeStr, AttSrcAsm, IntelSrcAsm, 115 dag Outs, dag Ins, string OpcodeStr, 126 OpcodeStr, AttSrcAsm, IntelSrcAsm, RHS, [all …]`
H A D	X86InstrAVX10.td	334 multiclass avx10_cvttpd2dqs<bits<8> opc, string OpcodeStr, SDPatternOperator OpNode, 338 defm Z : avx512_vcvt_fp<opc, OpcodeStr, v8i32x_info, v8f64_info, OpNode, 340 avx512_vcvt_fp_sae<opc, OpcodeStr, v8i32x_info, v8f64_info, 344 defm Z128 : avx512_vcvt_fp<opc, OpcodeStr, v4i32x_info, v2f64x_info, 347 defm Z256 : avx512_vcvt_fp<opc, OpcodeStr, v4i32x_info, v4f64x_info, OpNode, 352 defm Z256 : avx512_vcvt_fp_sae<opc, OpcodeStr, v4i32x_info, v4f64x_info, OpNodeSAE, 357 def : InstAlias<OpcodeStr#"x\t{$src, $dst\|$dst, $src}", 360 def : InstAlias<OpcodeStr#"x\t{$src, $dst {${mask}}\|$dst {${mask}}, $src}", 363 def : InstAlias<OpcodeStr#"x\t{$src, $dst {${mask}} {z}\|$dst {${mask}} {z}, $src}", 366 def : InstAlias<OpcodeStr#"x\t{${src}{1to2}, $dst\|$dst, ${src}{1to2}}", [all …]
H A D	X86InstrXOP.td	13 multiclass xop2op<bits<8> opc, string OpcodeStr, Intrinsic Int> { 15 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 18 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 42 multiclass xop2opsld<bits<8> opc, string OpcodeStr, Intrinsic Int, 46 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 49 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 54 multiclass xop2op128<bits<8> opc, string OpcodeStr, Intrinsic Int, 57 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 60 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 65 multiclass xop2op256<bits<8> opc, string OpcodeStr, Intrinsi [all...]
H A D	X86InstrFMA.td	`36 multiclass fma3p_rm_213<bits<8> opc, string OpcodeStr, RegisterClass RC, 41 !strconcat(OpcodeStr, 49 !strconcat(OpcodeStr, 56 multiclass fma3p_rm_231<bits<8> opc, string OpcodeStr, RegisterClass RC, 62 !strconcat(OpcodeStr, 69 !strconcat(OpcodeStr, 76 multiclass fma3p_rm_132<bits<8> opc, string OpcodeStr, RegisterClass RC, 82 !strconcat(OpcodeStr, 91 !strconcat(OpcodeStr, 101 string OpcodeStr, string PackTy, string Suff, [all …]`
H A D	X86InstrSSE.td	20 multiclass sse12_fp_scalar<bits<8> opc, string OpcodeStr, SDPatternOperator OpNode, 28 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 29 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst\|$dst, $src1, $src2}")), 35 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 36 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst\|$dst, $src1, $src2}")), 66 multiclass sse12_fp_packed<bits<8> opc, string OpcodeStr, SDPatternOperator OpNode, 74 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 75 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst\|$dst, $src1, $src2}")), 81 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 82 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst\|$dst, $src1, $src2}")), [all …]
H A D	X86InstrTBM.td	`18 multiclass tbm_bextri<bits<8> opc, RegisterClass RC, string OpcodeStr, 24 !strconcat(OpcodeStr, 30 !strconcat(OpcodeStr, 44 RegisterClass RC, string OpcodeStr, 48 !strconcat(OpcodeStr,"\t{$src, $dst\|$dst, $src}"), []>, 52 !strconcat(OpcodeStr,"\t{$src, $dst\|$dst, $src}"), []>, 57 multiclass tbm_binary_intr<bits<8> opc, string OpcodeStr, 60 defm NAME#32 : tbm_binary_rm<opc, FormReg, FormMem, GR32, OpcodeStr#"{l}", 62 defm NAME#64 : tbm_binary_rm<opc, FormReg, FormMem, GR64, OpcodeStr#"{q}",`
H A D	X86InstrMMX.td	34 multiclass MMXI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId, 39 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 46 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 52 string OpcodeStr, Intrinsic IntId, 57 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 62 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 67 !strconcat(OpcodeStr, "\t{$src2, $dst\|$dst, $src2}"), 74 multiclass SS3I_unop_rm_int_mm<bits<8> opc, string OpcodeStr, 77 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), 82 !strconcat(OpcodeStr, "\t{$src, $dst\|$dst, $src}"), [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A D	BPFInstrInfo.td	187 class JMP_RR<BPFJumpOp Opc, string OpcodeStr, PatLeaf Cond> 191 "if $dst "#OpcodeStr#" $src goto $BrDst", 203 class JMP_RI<BPFJumpOp Opc, string OpcodeStr, PatLeaf Cond> 207 "if $dst "#OpcodeStr#" $imm goto $BrDst", 219 class JMP_JCOND<BPFJumpOp Opc, string OpcodeStr, list<dag> Pattern> 223 !strconcat(OpcodeStr, " $BrDst"), 231 class JMP_RR_32<BPFJumpOp Opc, string OpcodeStr, PatLeaf Cond> 235 "if $dst "#OpcodeStr#" $src goto $BrDst", 247 class JMP_RI_32<BPFJumpOp Opc, string OpcodeStr, PatLeaf Cond> 251 "if $dst "#OpcodeStr#" $imm goto $BrDst", [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	ARMInstrNEON.td	2522 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 2525 (ins DPR:$Vm), IIC_VUNAD, OpcodeStr, Dt,"$Vd, $Vm", "", 2528 bits<2> op17_16, bits<5> op11_7, bit op4, string OpcodeStr, 2531 (ins QPR:$Vm), IIC_VUNAQ, OpcodeStr, Dt,"$Vd, $Vm", "", 2537 InstrItinClass itin, string OpcodeStr, string Dt, 2540 (ins DPR:$Vm), itin, OpcodeStr, Dt, "$Vd, $Vm", "", 2544 InstrItinClass itin, string OpcodeStr, string Dt, 2547 (ins QPR:$Vm), itin, OpcodeStr, Dt, "$Vd, $Vm", "", 2552 InstrItinClass itin, string OpcodeStr, string Dt, 2555 itin, OpcodeStr, Dt, [all …]
H A D	ARMInstrFormats.td	`2380 dag oops, dag iops, InstrItinClass itin, string OpcodeStr, 2383 OpcodeStr, Dt, "$Vd, $Vm", "", pattern> { 2490 string OpcodeStr, string Dt, list<dag> pattern> 2491 : NeonInp<oops, iops, AddrModeNone, IndexModeNone, f, itin, OpcodeStr,`
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVInstrInfoZc.td	`106 class CLoadB_ri<bits<6> funct6, string OpcodeStr> 109 OpcodeStr, "$rd, ${imm}(${rs1})"> { 116 class CLoadH_ri<bits<6> funct6, bit funct1, string OpcodeStr, 120 OpcodeStr, "$rd, ${imm}(${rs1})"> { 127 class CStoreB_rri<bits<6> funct6, string OpcodeStr> 130 OpcodeStr, "$rs2, ${imm}(${rs1})"> { 137 class CStoreH_rri<bits<6> funct6, bit funct1, string OpcodeStr, 141 OpcodeStr, "$rs2, ${imm}(${rs1})"> { 148 class RVZcArith_r<bits<5> funct5, string OpcodeStr> : 150 OpcodeStr, "$rd"> {`
H A D	RISCVInstrInfoC.td	`236 class CStackLoad<bits<3> funct3, string OpcodeStr, 239 OpcodeStr, "$rd, ${imm}(${rs1})">; 242 class CStackStore<bits<3> funct3, string OpcodeStr, 245 OpcodeStr, "$rs2, ${imm}(${rs1})">; 248 class CLoad_ri<bits<3> funct3, string OpcodeStr, 251 OpcodeStr, "$rd, ${imm}(${rs1})">; 254 class CStore_rri<bits<3> funct3, string OpcodeStr, 257 OpcodeStr, "$rs2, ${imm}(${rs1})">; 260 class Bcz<bits<3> funct3, string OpcodeStr> 262 OpcodeStr, "$rs1, $imm"> { [all …]`
H A D	RISCVInstrInfoXSf.td	`105 string OpcodeStr = !if(HaveOutputDst, "sf.vc.v." # suffix, 136 info.Ins, info.OpcodeStr, info.Prototype> { 143 info.Ins, info.OpcodeStr, info.Prototype> {`
H A D	RISCVInstrInfoXqci.td	`595 class QCIRVInst16CI_RS1<bits<5> funct5, string OpcodeStr> 596 : RVInst16CI<0b000, 0b10, (outs), (ins GPRNoX0:$rs1), OpcodeStr, "$rs1"> { 640 class QCIRVInst16CI_NONE<bits<5> funct5, string OpcodeStr> 641 : RVInst16CI<0b000, 0b10, (outs), (ins), OpcodeStr, ""> { 684 class QCIRVInst16CBSYNC<bits<3> imm5_func2, string OpcodeStr> 685 : RVInst16CB<0b100, 0b01, (outs), (ins uimm5slist:$slist), OpcodeStr, "$slist"> {`
/freebsd/contrib/llvm-project/llvm/lib/MC/MCParser/
H A D	AsmParser.cpp	`2252 std::string OpcodeStr = IDVal.lower(); in parseAndMatchAndEmitTargetInstruction() local 2254 bool ParseHadError = getTargetParser().parseInstruction(IInfo, OpcodeStr, ID, in parseAndMatchAndEmitTargetInstruction()`
H A D	MasmParser.cpp	`2306 std::string OpcodeStr = IDVal.lower(); in parseStatement() local 2308 bool ParseHadError = getTargetParser().parseInstruction(IInfo, OpcodeStr, ID, in parseStatement()`