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Searched refs:OpWidth (Results 1 – 7 of 7) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1580 unsigned OpWidth = cast<FixedVectorType>(Shuffle->getOperand(0)->getType()) in SimplifyDemandedVectorElts() local
1590 APInt LeftDemanded(OpWidth, 1); in SimplifyDemandedVectorElts()
1591 APInt LHSPoisonElts(OpWidth, 0); in SimplifyDemandedVectorElts()
1600 APInt LeftDemanded(OpWidth, 0), RightDemanded(OpWidth, 0); in SimplifyDemandedVectorElts()
1605 assert(MaskVal < OpWidth * 2 && in SimplifyDemandedVectorElts()
1607 if (MaskVal < OpWidth) in SimplifyDemandedVectorElts()
1610 RightDemanded.setBit(MaskVal - OpWidth); in SimplifyDemandedVectorElts()
1615 APInt LHSPoisonElts(OpWidth, 0); in SimplifyDemandedVectorElts()
1618 APInt RHSPoisonElts(OpWidth, 0); in SimplifyDemandedVectorElts()
1632 if (VWidth == OpWidth) { in SimplifyDemandedVectorElts()
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H A DInstCombineCasts.cpp1776 unsigned OpWidth = BO->getType()->getFPMantissaWidth(); in visitFPTrunc() local
1803 if (OpWidth >= 2*DstWidth+1 && DstWidth >= SrcWidth) { in visitFPTrunc()
1817 if (OpWidth >= LHSWidth + RHSWidth && DstWidth >= SrcWidth) { in visitFPTrunc()
1830 if (OpWidth >= 2*DstWidth && DstWidth >= SrcWidth) { in visitFPTrunc()
1841 if (SrcWidth == OpWidth) in visitFPTrunc()
H A DInstCombineCompares.cpp7851 unsigned OpWidth = Op0->getType()->getScalarSizeInBits(); in visitICmpInst() local
7855 OpWidth - 1))))) { in visitICmpInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp160 #define DECODE_SrcOp(Name, EncSize, OpWidth, EncImm) \ argument
165 return addOperand(Inst, DAsm->decodeSrcOp(OpWidth, EncImm)); \
169 unsigned OpWidth, unsigned Imm, unsigned EncImm, in decodeSrcOp() argument
173 return addOperand(Inst, DAsm->decodeSrcOp(OpWidth, EncImm)); in decodeSrcOp()
178 #define DECODE_OPERAND_SREG_7(RegClass, OpWidth) \ argument
179 DECODE_SrcOp(Decode##RegClass##RegisterClass, 7, OpWidth, Imm)
181 #define DECODE_OPERAND_SREG_8(RegClass, OpWidth) \ argument
182 DECODE_SrcOp(Decode##RegClass##RegisterClass, 8, OpWidth, Imm)
188 template <unsigned OpWidth>
191 return decodeSrcOp(Inst, 10, OpWidth, Imm, Imm | AMDGPU::EncValues::IS_VGPR, in decodeAV10()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp1621 OpWidth = OperandType->getIntegerBitWidth(); in isValidStrlenIdiom()
1623 if (OpWidth != StepSize * 8) in isValidStrlenIdiom()
1625 if (OpWidth != 8 && OpWidth != 16 && OpWidth != 32) in isValidStrlenIdiom()
1627 if (OpWidth >= 16) in isValidStrlenIdiom()
1628 if (OpWidth != WcharSize * 8) in isValidStrlenIdiom()
1672 unsigned OpWidth; member in __anon360f5f450811::StrlenVerifier
1755 if (Verifier.OpWidth == 8) { in recognizeAndInsertStrLen()
1776 if (Verifier.OpWidth == 8) { in recognizeAndInsertStrLen()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp2375 unsigned OpWidth = std::max(Op1Info.Width, Op2Info.Width); in EmitCheckedMixedSignMultiply()
2394 llvm::APInt::getSignedMaxValue(ResultInfo.Width).zext(OpWidth); in EmitCheckedMixedSignMultiply()
2412 if (ResultInfo.Width < OpWidth) { in EmitCheckedMixedSignMultiply()
2414 llvm::APInt::getMaxValue(ResultInfo.Width).zext(OpWidth); in EmitCheckedMixedSignMultiply()
2372 unsigned OpWidth = std::max(Op1Info.Width, Op2Info.Width); EmitCheckedMixedSignMultiply() local
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp31683 unsigned OpWidth = MemType->getPrimitiveSizeInBits(); in needsCmpXchgNb() local
31685 if (OpWidth == 64) in needsCmpXchgNb()
31687 if (OpWidth == 128) in needsCmpXchgNb()