Home
last modified time | relevance | path

Searched refs:OpVT (Results 1 – 25 of 33) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRuntimeLibcallUtil.h31 Libcall getFPEXT(EVT OpVT, EVT RetVT);
35 Libcall getFPROUND(EVT OpVT, EVT RetVT);
39 Libcall getFPTOSINT(EVT OpVT, EVT RetVT);
43 Libcall getFPTOUINT(EVT OpVT, EVT RetVT);
47 Libcall getSINTTOFP(EVT OpVT, EVT RetVT);
51 Libcall getUINTTOFP(EVT OpVT, EVT RetVT);
H A DSelectionDAG.h703 SDValue getBoolConstant(bool V, const SDLoc &DL, EVT VT, EVT OpVT);
1023 SDValue getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, EVT OpVT);
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp120 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { in getFPEXT() argument
121 if (OpVT == MVT::f16) { in getFPEXT()
130 } else if (OpVT == MVT::f32) { in getFPEXT()
137 } else if (OpVT == MVT::f64) { in getFPEXT()
142 } else if (OpVT == MVT::f80) { in getFPEXT()
145 } else if (OpVT == MVT::bf16) { in getFPEXT()
155 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { in getFPROUND() argument
157 if (OpVT == MVT::f32) in getFPROUND()
159 if (OpVT == MVT::f64) in getFPROUND()
161 if (OpVT == MVT::f80) in getFPROUND()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeFloatTypes.cpp189 EVT OpVT = N->getOperand(0 + Offset).getValueType(); in SoftenFloatRes_Unary() local
190 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_Unary()
599 EVT OpVT = N->getOperand(IsStrict ? 1 : 0).getValueType(); in SoftenFloatRes_FP_EXTEND() local
600 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_FP_EXTEND()
651 EVT OpVT = N->getOperand(IsStrict ? 1 : 0).getValueType(); in SoftenFloatRes_FP_ROUND() local
652 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatRes_FP_ROUND()
1310 EVT OpVT = N->getOperand(0 + Offset).getValueType(); in SoftenFloatOp_Unary() local
1311 CallOptions.setTypeListBeforeSoften(OpVT, N->getValueType(0), true); in SoftenFloatOp_Unary()
1325 EVT OpVT = N->getOperand(N->isStrictFPOpcode() ? 1 : 0).getValueType(); in SoftenFloatOp_LROUND() local
1326 return SoftenFloatOp_Unary(N, GetFPLibCall(OpVT, in SoftenFloatOp_LROUND()
[all …]
H A DTargetLowering.cpp3983 EVT OpVT = N0.getValueType(); in foldSetCCWithAnd() local
3984 if (N0.getOpcode() != ISD::AND || !OpVT.isInteger() || in foldSetCCWithAnd()
3991 (getBooleanContents(OpVT) == TargetLowering::UndefinedBooleanContent || in foldSetCCWithAnd()
3992 getBooleanContents(OpVT) == TargetLowering::ZeroOrOneBooleanContent)) { in foldSetCCWithAnd()
3993 unsigned NumEltBits = OpVT.getScalarSizeInBits(); in foldSetCCWithAnd()
3996 return DAG.getBoolExtOrTrunc(N0, DL, VT, OpVT); in foldSetCCWithAnd()
4008 isTypeLegal(OpVT) && N0.hasOneUse()) { in foldSetCCWithAnd()
4011 if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) { in foldSetCCWithAnd()
4036 SDValue Zero = DAG.getConstant(0, DL, OpVT); in foldSetCCWithAnd()
4037 if (isXAndYEqZeroPreferableToXAndYEqY(Cond, OpVT) && in foldSetCCWithAnd()
[all …]
H A DLegalizeVectorTypes.cpp418 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_FP_ROUND()
421 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_FP_ROUND()
424 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_FP_ROUND()
470 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_UnaryOp()
479 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_UnaryOp()
482 EVT VT = OpVT.getVectorElementType(); in ScalarizeVecRes_UnaryOp()
501 EVT OpVT = Op.getValueType(); in ScalarizeVecRes_VecInregOp()
502 EVT OpEltVT = OpVT.getVectorElementType(); in ScalarizeVecRes_VecInregOp()
505 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) { in ScalarizeVecRes_VecInregOp()
527 EVT OpVT in ScalarizeVecRes_ADDRSPACECAST()
414 EVT OpVT = Op.getValueType(); ScalarizeVecRes_FP_ROUND() local
466 EVT OpVT = Op.getValueType(); ScalarizeVecRes_UnaryOp() local
497 EVT OpVT = Op.getValueType(); ScalarizeVecRes_VecInregOp() local
523 EVT OpVT = Op.getValueType(); ScalarizeVecRes_ADDRSPACECAST() local
557 EVT OpVT = Cond.getValueType(); ScalarizeVecRes_VSELECT() local
584 EVT OpVT = Cond->getOperand(0).getValueType(); ScalarizeVecRes_VSELECT() local
674 EVT OpVT = LHS.getValueType(); ScalarizeVecRes_SETCC() local
919 EVT OpVT = N->getOperand(0).getValueType(); ScalarizeVecOp_VSETCC() local
4144 EVT OpVT = N->getOperand(0).getValueType(); SplitVecOp_VSETCC() local
4645 EVT OpVT = LHS.getValueType(); WidenVecRes_CMP() local
4876 EVT OpVT = Oper.getValueType(); WidenVecRes_StrictFP() local
4905 EVT OpVT = Op.getValueType(); WidenVecRes_StrictFP() local
4936 EVT OpVT = Op.getValueType(); WidenVecRes_StrictFP() local
6558 EVT OpVT = N->getOperand(0).getValueType(); WidenVecOp_CMP() local
6610 EVT OpVT = N->getOperand(0).getValueType(); WidenVecOp_IS_FPCLASS() local
7125 EVT OpVT = N->getOperand(0).getValueType(); WidenVecOp_SETCC() local
[all...]
H A DSelectionDAG.cpp1518 EVT OpVT) { in getBoolExtOrTrunc() argument
1522 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT); in getBoolExtOrTrunc()
1527 EVT OpVT = Op.getValueType(); in getZeroExtendInReg() local
1528 assert(VT.isInteger() && OpVT.isInteger() && in getZeroExtendInReg()
1530 assert(VT.isVector() == OpVT.isVector() && in getZeroExtendInReg()
1534 VT.getVectorElementCount() == OpVT.getVectorElementCount()) && in getZeroExtendInReg()
1536 assert(VT.bitsLE(OpVT) && "Not extending!"); in getZeroExtendInReg()
1537 if (OpVT == VT) in getZeroExtendInReg()
1539 APInt Imm = APInt::getLowBitsSet(OpVT.getScalarSizeInBits(), in getZeroExtendInReg()
1541 return getNode(ISD::AND, DL, OpVT, Op, getConstant(Imm, DL, OpVT)); in getZeroExtendInReg()
[all …]
H A DLegalizeVectorOps.cpp319 MVT OpVT = Node->getOperand(1).getSimpleValueType(); in LegalizeOp() local
321 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp()
323 Action = TLI.getOperationAction(Node->getOpcode(), OpVT); in LegalizeOp()
504 MVT OpVT = Node->getOperand(0).getSimpleValueType(); in LegalizeOp() local
506 Action = TLI.getCondCodeAction(CCCode, OpVT); in LegalizeOp()
508 Action = TLI.getOperationAction(Node->getOpcode(), OpVT); in LegalizeOp()
1708 MVT OpVT = LHS.getSimpleValueType(); in ExpandSETCC() local
1711 if (TLI.getCondCodeAction(CCCode, OpVT) != TargetLowering::Expand) { in ExpandSETCC()
H A DScheduleDAGSDNodes.cpp486 EVT OpVT = N->getOperand(i).getValueType(); in AddSchedEdges() local
487 assert(OpVT != MVT::Glue && "Glued nodes should be in same sunit!"); in AddSchedEdges()
488 bool isChain = OpVT == MVT::Other; in AddSchedEdges()
H A DDAGCombiner.cpp5958 EVT OpVT = LL.getValueType(); in foldLogicOfSetCCs() local
5960 if (VT != getSetCCResultType(OpVT)) in foldLogicOfSetCCs()
5962 if (OpVT != RL.getValueType()) in foldLogicOfSetCCs()
5967 bool IsInteger = OpVT.isInteger(); in foldLogicOfSetCCs()
5986 SDValue Or = DAG.getNode(ISD::OR, SDLoc(N0), OpVT, LL, RL); in foldLogicOfSetCCs()
6005 SDValue And = DAG.getNode(ISD::AND, SDLoc(N0), OpVT, LL, RL); in foldLogicOfSetCCs()
6013 if (IsAnd && LL == RL && CC0 == CC1 && OpVT.getScalarSizeInBits() > 1 && in foldLogicOfSetCCs()
6017 SDValue One = DAG.getConstant(1, DL, OpVT); in foldLogicOfSetCCs()
6018 SDValue Two = DAG.getConstant(2, DL, OpVT); in foldLogicOfSetCCs()
6019 SDValue Add = DAG.getNode(ISD::ADD, SDLoc(N0), OpVT, LL, One); in foldLogicOfSetCCs()
[all …]
H A DLegalizeTypes.cpp312 EVT OpVT = Op.getValueType(); in run() local
313 switch (getTypeAction(OpVT)) { in run()
H A DInstrEmitter.cpp413 MVT OpVT = Op.getSimpleValueType(); in AddOperand() local
418 TLI->isTypeLegal(OpVT) in AddOperand()
419 ? TLI->getRegClassFor(OpVT, in AddOperand()
H A DLegalizeIntegerTypes.cpp2254 EVT OpVT = N->getOpcode() == ISD::SELECT ? OpTy.getScalarType() : OpTy; in PromoteIntOp_SELECT() local
2255 Cond = PromoteTargetBoolean(Cond, OpVT); in PromoteIntOp_SELECT()
5863 EVT OpVT = Op.getValueType(); in PromoteIntRes_BUILD_VECTOR() local
5868 if (OpVT.bitsLT(NOutVTElem)) { in PromoteIntRes_BUILD_VECTOR()
5873 if (OpVT == MVT::i1 && Op.getOpcode() == ISD::Constant) in PromoteIntRes_BUILD_VECTOR()
5938 EVT OpVT = Op.getValueType(); in PromoteIntRes_CONCAT_VECTORS() local
5939 if (getTypeAction(OpVT) == TargetLowering::TypePromoteInteger) in PromoteIntRes_CONCAT_VECTORS()
5942 assert(getTypeAction(OpVT) == TargetLowering::TypeLegal && in PromoteIntRes_CONCAT_VECTORS()
5945 if (OpVT.getVectorElementType().getScalarSizeInBits() < in PromoteIntRes_CONCAT_VECTORS()
5948 OpVT.changeVectorElementType(MaxElementVT)); in PromoteIntRes_CONCAT_VECTORS()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2557 EVT OpVT = Op.getOperand(0).getValueType(); in LowerSINT_TO_FP() local
2558 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP()
2560 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2564 && (!hasHardQuad || !TLI.isTypeLegal(OpVT))) { in LowerSINT_TO_FP()
2565 const char *libName = TLI.getLibcallName(OpVT == MVT::i32 in LowerSINT_TO_FP()
2572 if (!TLI.isTypeLegal(OpVT)) in LowerSINT_TO_FP()
2577 unsigned opcode = (OpVT == MVT::i32)? SPISD::ITOF : SPISD::XTOF; in LowerSINT_TO_FP()
2606 EVT OpVT = Op.getOperand(0).getValueType(); in LowerUINT_TO_FP() local
2607 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
2611 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT))) in LowerUINT_TO_FP()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4249 EVT OpVT = Op.getValueType(); in SplitOpsAndApply() local
4250 unsigned NumSubElts = OpVT.getVectorNumElements() / NumSubs; in SplitOpsAndApply()
4251 unsigned SizeSub = OpVT.getSizeInBits() / NumSubs; in SplitOpsAndApply()
4269 auto MakeBroadcastOp = [&](SDValue Op, MVT OpVT, MVT DstVT) { in getAVX512Node() argument
4270 unsigned OpEltSizeInBits = OpVT.getScalarSizeInBits(); in getAVX512Node()
4273 if (!OpVT.isInteger() || OpEltSizeInBits < 32 || in getAVX512Node()
4277 if (OpVT == DstVT && Op.getOpcode() != ISD::BITCAST) in getAVX512Node()
4300 MVT OpVT = Op.getSimpleValueType(); in getAVX512Node() local
4302 if (!OpVT.isVector()) in getAVX512Node()
4304 assert(OpVT == VT && "Vector type mismatch"); in getAVX512Node()
[all …]
H A DX86InstrSSE.td2264 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
2273 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
2280 [(set RC:$dst, (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
4758 ValueType DstVT, ValueType OpVT, RegisterClass RC,
4767 [(set RC:$dst, (DstVT (OpNode (OpVT RC:$src1), RC:$src2)))]>,
4775 (DstVT (OpNode (OpVT RC:$src1), (memop_frag addr:$src2))))]>,
5852 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
5861 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
5869 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>,
6012 ValueType OpVT, RegisterClass RC, PatFrag memop_frag,
[all …]
H A DX86InstrFMA.td391 X86MemOperand x86memop, ValueType OpVT, SDPatternOperator OpNode,
399 (OpVT (OpNode RC:$src1, RC:$src2, RC:$src3)))]>, REX_W, VEX_LIG,
H A DX86ISelDAGToDAG.cpp603 EVT OpVT = N->getOperand(0).getValueType(); in INITIALIZE_PASS() local
607 OpVT = N->getOperand(1).getValueType(); in INITIALIZE_PASS()
608 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in INITIALIZE_PASS()
4326 EVT OpVT = ShiftAmt.getValueType(); in tryShiftAmountMod() local
4328 SDValue AllOnes = CurDAG->getAllOnesConstant(DL, OpVT); in tryShiftAmountMod()
4329 NewShiftAmt = CurDAG->getNode(ISD::XOR, DL, OpVT, in tryShiftAmountMod()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1799 EVT OpVT = Ops[0].getValueType(); in PerformDAGCombine() local
1800 if (InVal.getValueType() != OpVT) in PerformDAGCombine()
1801 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
1802 DAG.getNode(ISD::ANY_EXTEND, DL, OpVT, InVal) : in PerformDAGCombine()
1803 DAG.getNode(ISD::TRUNCATE, DL, OpVT, InVal); in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1955 EVT OpVT) const { in shouldExpandGetActiveLaneMask()
1968 if (OpVT != MVT::i32 && OpVT != MVT::i64) in shouldExpandGetActiveLaneMask()
4908 EVT OpVT = Op.getValueType(); in LowerBITCAST() local
4911 if (useSVEForFixedLengthVectorVT(OpVT)) in LowerBITCAST()
4914 if (OpVT.isScalableVector()) { in LowerBITCAST()
4920 if (OpVT.getVectorElementCount() != ArgVT.getVectorElementCount()) in LowerBITCAST()
4923 if (isTypeLegal(OpVT) && !isTypeLegal(ArgVT)) { in LowerBITCAST()
4924 assert(OpVT.isFloatingPoint() && !ArgVT.isFloatingPoint() && in LowerBITCAST()
4929 return getSVESafeBitCast(OpVT, ExtResult, DAG); in LowerBITCAST()
4931 return getSVESafeBitCast(OpVT, Op.getOperand(0), DAG); in LowerBITCAST()
[all …]
H A DAArch64ISelLowering.h992 bool shouldExpandGetActiveLaneMask(EVT VT, EVT OpVT) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp6945 MVT OpVT = Op.getOperand(0).getSimpleValueType(); in LowerOperation()
6946 if (OpVT.isScalarInteger()) { in LowerOperation()
6970 DL, VT, LHS, DAG.getConstant(Imm + 1, DL, OpVT), CCVal); in LowerOperation()
8791 MVT OpVT = ScalarOp.getSimpleValueType(); in lowerVectorIntrinsicScalars()
8795 if (!OpVT.isScalarInteger() || OpVT == XLenVT) in lowerVectorIntrinsicScalars()
8799 if (OpVT.bitsLT(XLenVT)) { in lowerVectorIntrinsicScalars()
8820 assert(XLenVT == MVT::i32 && OpVT == MVT::i64 && in lowerVectorIntrinsicScalars()
8991 MVT OpVT = Op0.getSimpleValueType(); in lowerCttzElts()
8992 MVT ContainerVT = OpVT; in lowerCttzElts()
6943 MVT OpVT = Op.getOperand(0).getSimpleValueType(); LowerOperation() local
8789 MVT OpVT = ScalarOp.getSimpleValueType(); lowerVectorIntrinsicScalars() local
8989 MVT OpVT = Op0.getSimpleValueType(); lowerCttzElts() local
9029 MVT OpVT = ScalarOp.getSimpleValueType(); promoteVCIXScalar() local
11275 MVT OpVT = V.getSimpleValueType(); lowerVPOp() local
12249 EVT OpVT = Op0.getValueType(); ReplaceNodeResults() local
12284 EVT OpVT = Op0.getValueType(); ReplaceNodeResults() local
14176 EVT OpVT = N0.getValueType(); performSETCCCombine() local
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp1602 EVT OpVT = Op0.getValueType(); in lowerUINT_TO_FP() local
1604 RTLIB::Libcall LC = RTLIB::getUINTTOFP(OpVT, RetVT); in lowerUINT_TO_FP()
1606 CallOptions.setTypeListBeforeSoften(OpVT, RetVT, true); in lowerUINT_TO_FP()
1627 EVT OpVT = Op0.getValueType(); in lowerSINT_TO_FP() local
1629 RTLIB::Libcall LC = RTLIB::getSINTTOFP(OpVT, RetVT); in lowerSINT_TO_FP()
1631 CallOptions.setTypeListBeforeSoften(OpVT, RetVT, true); in lowerSINT_TO_FP()
2858 EVT OpVT = Src.getValueType(); in ReplaceNodeResults() local
2859 CallOptions.setTypeListBeforeSoften(OpVT, VT, true); in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1302 EVT OpVT = OpI1.getValueType(); in ppHoistZextI1() local
1303 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1) in ppHoistZextI1()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp6568 EVT OpVT = Op.getValueType(); in combineExtract() local
6569 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
6598 EVT OpVT = Op.getOperand(0).getValueType(); in combineExtract() local
6600 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
9709 EVT OpVT = Op.getValueType(); in lowerVECREDUCE_ADD() local
9711 assert(OpVT.isVector() && "Operand type for VECREDUCE_ADD is not a vector."); in lowerVECREDUCE_ADD()
9716 SDValue Zero = DAG.getSplatBuildVector(OpVT, DL, DAG.getConstant(0, DL, VT)); in lowerVECREDUCE_ADD()
9719 switch (OpVT.getScalarSizeInBits()) { in lowerVECREDUCE_ADD()
9736 ISD::EXTRACT_VECTOR_ELT, DL, VT, DAG.getBitcast(OpVT, Op), in lowerVECREDUCE_ADD()
9737 DAG.getConstant(OpVT.getVectorNumElements() - 1, DL, MVT::i32)); in lowerVECREDUCE_ADD()

12