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Searched refs:OpSize (Results 1 – 25 of 39) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.h73 bool isAmbiguous_64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_64() argument
74 if (InstTy == InstType::Ambiguous && OpSize == 64) in isAmbiguous_64()
79 bool isAmbiguous_32(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32() argument
80 if (InstTy == InstType::Ambiguous && OpSize == 32) in isAmbiguous_32()
85 bool isAmbiguous_32or64(InstType InstTy, unsigned OpSize) const { in isAmbiguous_32or64() argument
86 if (InstTy == InstType::Ambiguous && (OpSize == 32 || OpSize == 64)) in isAmbiguous_32or64()
92 unsigned OpSize) const { in isAmbiguousWithMergeOrUnmerge_64() argument
93 if (InstTy == InstType::AmbiguousWithMergeOrUnmerge && OpSize == 64) in isAmbiguousWithMergeOrUnmerge_64()
98 bool isFloatingPoint_32or64(InstType InstTy, unsigned OpSize) const { in isFloatingPoint_32or64() argument
99 if (InstTy == InstType::FloatingPoint && (OpSize == 32 || OpSize == 64)) in isFloatingPoint_32or64()
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/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DX86RecognizableInstr.h196 uint8_t OpSize; member
285 uint8_t OpSize);
296 uint8_t OpSize);
301 uint8_t OpSize);
306 uint8_t OpSize);
308 uint8_t OpSize);
310 uint8_t OpSize);
312 uint8_t OpSize);
314 uint8_t OpSize);
316 uint8_t OpSize);
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H A DX86RecognizableInstr.cpp118 OpSize = byteFromRec(Rec, "OpSizeBits"); in RecognizableInstrBase()
368 if (HasREX_W && (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD)) in insnContext()
372 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
374 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
378 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize32) in insnContext()
380 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
399 if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XD) in insnContext()
401 else if (OpSize == X86Local::OpSize16 && OpPrefix == X86Local::XS) in insnContext()
409 else if (OpSize == X86Local::OpSize16 && AdSize == X86Local::AdSize16) in insnContext()
411 else if (OpSize == X86Local::OpSize16 || OpPrefix == X86Local::PD) in insnContext()
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H A DX86FoldTablesEmitter.cpp373 RegRI.OpSize, RegRI.AdSize, RegRI.HasREX_W, RegRI.HasVEX_4V, in operator ()()
380 MemRI.OpSize, MemRI.AdSize, MemRI.HasREX_W, MemRI.HasVEX_4V, in operator ()()
/freebsd/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DMCExternalSymbolizer.cpp37 bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) { in tryAddingSymbolicOperand() argument
43 !GetOpInfo(DisInfo, Address, Offset, OpSize, InstSize, 1, &SymbolicOp)) { in tryAddingSymbolicOperand()
56 if (!SymbolLookUp || (OpSize == 1 && !IsBranch)) in tryAddingSymbolicOperand()
H A DMCDisassembler.cpp30 uint64_t Offset, uint64_t OpSize, in tryAddingSymbolicOperand() argument
36 OpSize, InstSize); in tryAddingSymbolicOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMLegalizerInfo.cpp380 auto OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in legalizeCustom() local
385 auto Libcalls = getFCmpLibcalls(Predicate, OpSize); in legalizeCustom()
397 assert((OpSize == 32 || OpSize == 64) && "Unsupported operand size"); in legalizeCustom()
398 auto *ArgTy = OpSize == 32 ? Type::getFloatTy(Ctx) : Type::getDoubleTy(Ctx); in legalizeCustom()
H A DARMInstructionSelector.cpp462 unsigned OpRegBank, unsigned OpSize) in CmpConstants()
465 OperandSize(OpSize) {} in CmpConstants()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.h32 uint64_t Offset, uint64_t OpSize,
H A DAArch64ExternalSymbolizer.cpp62 bool IsBranch, uint64_t Offset, uint64_t OpSize, uint64_t InstSize) { in tryAddingSymbolicOperand() argument
75 if (!GetOpInfo || !GetOpInfo(DisInfo, Address, /*Offset=*/0, OpSize, InstSize, in tryAddingSymbolicOperand()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/MCDisassembler/
H A DMCExternalSymbolizer.h49 uint64_t Offset, uint64_t OpSize,
H A DMCSymbolizer.h73 uint64_t OpSize, uint64_t InstSize) = 0;
H A DMCDisassembler.h219 bool IsBranch, uint64_t Offset, uint64_t OpSize,
/freebsd/contrib/llvm-project/llvm/include/llvm-c/
H A DDisassemblerTypes.h49 uint64_t OpSize, uint64_t InstSize,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp766 SmallVector<unsigned, 4> OpSize(NumOperands); in getInstrMapping() local
776 OpSize[Idx] = Ty.getSizeInBits().getKnownMinValue(); in getInstrMapping()
860 TypeSize::getFixed(OpSize[0])); in getInstrMapping()
1172 getValueMapping(OpRegBankIdx[Idx], TypeSize::getFixed(OpSize[Idx])); in getInstrMapping()
H A DAArch64InstructionSelector.cpp821 unsigned OpSize) { in selectBinaryOp() argument
824 if (OpSize == 32) { in selectBinaryOp()
835 } else if (OpSize == 64) { in selectBinaryOp()
851 switch (OpSize) { in selectBinaryOp()
892 unsigned OpSize) { in selectLoadStoreUIOp() argument
896 switch (OpSize) { in selectLoadStoreUIOp()
908 switch (OpSize) { in selectLoadStoreUIOp()
3231 const unsigned OpSize = Ty.getSizeInBits(); in select() local
3236 const unsigned NewOpc = selectBinaryOp(I.getOpcode(), RB.getID(), OpSize); in select()
4585 unsigned OpSize = Ty.getSizeInBits(); in emitFPCompare() local
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLowerMemIntrinsics.cpp160 Value *Len, Value *OpSize, in getRuntimeLoopRemainder() argument
165 return B.CreateURem(Len, OpSize); in getRuntimeLoopRemainder()
173 Value *Len, Value *OpSize, unsigned OpSizeVal, in getRuntimeLoopBytes() argument
176 RTLoopRemainder = getRuntimeLoopRemainder(DL, B, Len, OpSize, OpSizeVal); in getRuntimeLoopBytes()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp155 unsigned OpSize) { in selectLoadStoreOp() argument
159 switch (OpSize) { in selectLoadStoreOp()
169 switch (OpSize) { in selectLoadStoreOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.h243 uint64_t Offset, uint64_t OpSize,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFormats.td232 OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
234 bits<2> OpSizeBits = OpSize.Value;
/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/
H A DDWARFEmitter.cpp1051 if (Expected<uint64_t> OpSize = in writeListEntry() local
1053 DescriptionsLength += *OpSize; in writeListEntry()
1055 return OpSize.takeError(); in writeListEntry()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp733 int64_t OpSize = MFI.getObjectSize(FI); in foldMemoryOperand() local
738 OpSize = SubRegSize / 8; in foldMemoryOperand()
741 MemSize = std::max(MemSize, OpSize); in foldMemoryOperand()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DNumericalStabilitySanitizer.cpp2183 uint64_t OpSize = 0; in GetMemOpSize() local
2187 OpSize = CInt->getValue().getZExtValue(); in GetMemOpSize()
2190 return OpSize; in GetMemOpSize()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp894 unsigned OpSize = OpTy.getSizeInBits(); in executeInWaterfallLoop() local
895 bool Is64 = OpSize % 64 == 0; in executeInWaterfallLoop()
898 unsigned NumParts = OpSize / PartSize; in executeInWaterfallLoop()
4775 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping() local
4776 OpdsMapping[2] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, OpSize); in getInstrMapping()
4777 OpdsMapping[3] = AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, OpSize); in getInstrMapping()
5040 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping() local
5043 OpdsMapping[2] = AMDGPU::getValueMapping(regBankID, OpSize); in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DGISelValueTracking.cpp528 unsigned OpSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in computeKnownBitsImpl() local
534 Known.insertBits(SrcOpKnown, I * OpSize); in computeKnownBitsImpl()

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