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Searched refs:Op1VT (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SelectionDAGInfo.cpp47 EVT Op1VT = N->getOperand(1).getValueType(); in verifyTargetNode() local
48 assert(VT.isVector() && Op0VT.isVector() && Op1VT.isVector() && in verifyTargetNode()
49 VT.isInteger() && Op0VT.isInteger() && Op1VT.isInteger() && in verifyTargetNode()
53 assert(Op0VT.getSizeInBits() == Op1VT.getSizeInBits() && in verifyTargetNode()
55 assert(Op0VT.getVectorElementCount() * 2 == Op1VT.getVectorElementCount() && in verifyTargetNode()
86 EVT Op1VT = N->getOperand(1).getValueType(); in verifyTargetNode() local
87 assert(VT.isVector() && Op0VT.isVector() && Op1VT.isVector() && in verifyTargetNode()
89 assert(VT == Op0VT && VT == Op1VT && "Expected matching vectors!"); in verifyTargetNode()
97 EVT Op1VT = N->getOperand(1).getValueType(); in verifyTargetNode() local
106 assert(Op1VT == MVT::i32 && isa<ConstantSDNode>(N->getOperand(1)) && in verifyTargetNode()
H A DAArch64ISelLowering.cpp5497 EVT Op1VT = Op1.getValueType(); in LowerMUL() local
5502 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
5504 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)), in LowerMUL()
5723 EVT Op1VT = Op1.getValueType(); in LowerVectorMatch() local
5727 assert((Op1VT.getVectorElementType() == MVT::i8 || in LowerVectorMatch()
5728 Op1VT.getVectorElementType() == MVT::i16) && in LowerVectorMatch()
5734 EVT OpContainerVT = Op1VT.isScalableVector() in LowerVectorMatch()
5735 ? Op1VT in LowerVectorMatch()
5736 : getContainerForFixedLengthVector(DAG, Op1VT); in LowerVectorMatch()
5766 Mask = DAG.getNode(ISD::SIGN_EXTEND, DL, Op1VT, Mask); in LowerVectorMatch()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp432 EVT Op1VT = EVT::getEVT(Op1->getType()); in shouldExpandPartialReductionIntrinsic() local
433 if (Op1VT.getVectorElementType() == VT.getVectorElementType() && in shouldExpandPartialReductionIntrinsic()
434 ((VT.getVectorElementCount() * 2 == Op1VT.getVectorElementCount()) || in shouldExpandPartialReductionIntrinsic()
435 (VT.getVectorElementCount() * 4 == Op1VT.getVectorElementCount()))) in shouldExpandPartialReductionIntrinsic()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp16201 EVT Op1VT = N->getOperand(1).getValueType(); in combineStoreFPToInt() local
16209 (Op1VT == MVT::i32 || (Op1VT == MVT::i64 && Subtarget.isPPC64()) || in combineStoreFPToInt()
16210 (Subtarget.hasP9Vector() && (Op1VT == MVT::i16 || Op1VT == MVT::i8))); in combineStoreFPToInt()
16216 if ((Op1VT != MVT::i64 && !Subtarget.hasP8Vector()) || in combineStoreFPToInt()
16223 unsigned ByteSize = Op1VT.getScalarSizeInBits() / 8; in combineStoreFPToInt()
16226 DAG.getValueType(Op1VT)}; in combineStoreFPToInt()
16748 EVT Op1VT = N->getOperand(1).getValueType(); in PerformDAGCombine() local
16768 (Op1VT == MVT::i32 || Op1VT == MVT::i16 || in PerformDAGCombine()
16769 (Subtarget.hasLDBRX() && Subtarget.isPPC64() && Op1VT == MVT::i64))) { in PerformDAGCombine()
16784 if (Op1VT.bitsGT(mVT)) { in PerformDAGCombine()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9206 EVT Op1VT = V1.getValueType(); in LowerCONCAT_VECTORS_i1() local
9208 assert(Op1VT == Op2VT && "Operand types don't match!"); in LowerCONCAT_VECTORS_i1()
9209 assert((Op1VT == MVT::v2i1 || Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) && in LowerCONCAT_VECTORS_i1()
9211 EVT VT = Op1VT.getDoubleNumVectorElementsVT(*DAG.getContext()); in LowerCONCAT_VECTORS_i1()
9213 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerCONCAT_VECTORS_i1()
9220 unsigned NumElts = 2 * Op1VT.getVectorNumElements(); in LowerCONCAT_VECTORS_i1()
9223 if (Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) { in LowerCONCAT_VECTORS_i1()
9308 EVT Op1VT = V1.getValueType(); in LowerEXTRACT_SUBVECTOR() local
9317 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerEXTRACT_SUBVECTOR()
9745 EVT Op1VT = Op1.getValueType(); in LowerMUL() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp8190 EVT Op1VT = Op1.getValueType(); in visitIntrinsicCall() local
8197 if (!TLI.shouldExpandVectorMatch(Op1VT, SearchSize)) { in visitIntrinsicCall()
8208 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, sdl, Op1VT, Op2Elem); in visitIntrinsicCall()