Lines Matching refs:Op1VT
9154 EVT Op1VT = V1.getValueType(); in LowerCONCAT_VECTORS_i1() local
9156 assert(Op1VT == Op2VT && "Operand types don't match!"); in LowerCONCAT_VECTORS_i1()
9157 assert((Op1VT == MVT::v2i1 || Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) && in LowerCONCAT_VECTORS_i1()
9159 EVT VT = Op1VT.getDoubleNumVectorElementsVT(*DAG.getContext()); in LowerCONCAT_VECTORS_i1()
9161 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerCONCAT_VECTORS_i1()
9168 unsigned NumElts = 2 * Op1VT.getVectorNumElements(); in LowerCONCAT_VECTORS_i1()
9171 if (Op1VT == MVT::v4i1 || Op1VT == MVT::v8i1) { in LowerCONCAT_VECTORS_i1()
9256 EVT Op1VT = V1.getValueType(); in LowerEXTRACT_SUBVECTOR() local
9265 SDValue NewV1 = PromoteMVEPredVector(dl, V1, Op1VT, DAG); in LowerEXTRACT_SUBVECTOR()
9693 EVT Op1VT = Op1.getValueType(); in LowerMUL() local
9696 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
9698 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()