Home
last modified time | relevance | path

Searched refs:Op0 (Results 1 – 25 of 182) sorted by relevance

12345678

/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DVPlanPatternMatch.h133 Op0_t Op0;
135 UnaryRecipe_match(Op0_t Op0) : Op0(Op0) {}
147 return Op0.match(R->getOperand(0));
163 Op0_t Op0;
166 BinaryRecipe_match(Op0_t Op0, Op1_t Op1) : Op0(Op0), Op1(Op1) {}
182 if (Op0.match(R->getOperand(0)) && Op1.match(R->getOperand(1)))
184 return Commutative && Op0.match(R->getOperand(1)) &&
202 m_VPInstruction(const Op0_t &Op0) {
203 return UnaryVPInstruction_match<Op0_t, Opcode>(Op0);
208 m_VPInstruction(const Op0_t &Op0, const Op1_t &Op1) {
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionSimplify.cpp300 BinaryOperator *Op0 = dyn_cast<BinaryOperator>(LHS); in simplifyAssociativeBinOp() local
304 if (Op0 && Op0->getOpcode() == Opcode) { in simplifyAssociativeBinOp()
305 Value *A = Op0->getOperand(0); in simplifyAssociativeBinOp()
306 Value *B = Op0->getOperand(1); in simplifyAssociativeBinOp()
348 if (Op0 && Op0->getOpcode() == Opcode) { in simplifyAssociativeBinOp()
349 Value *A = Op0->getOperand(0); in simplifyAssociativeBinOp()
350 Value *B = Op0->getOperand(1); in simplifyAssociativeBinOp()
608 Value *&Op0, Value *&Op1, in foldOrCommuteConstant() argument
610 if (auto *CLHS = dyn_cast<Constant>(Op0)) { in foldOrCommuteConstant()
628 std::swap(Op0, Op1); in foldOrCommuteConstant()
[all …]
H A DOverflowInstAnalysis.cpp21 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow() argument
28 if (!match(Op0, m_ICmp(Pred, m_Value(X), m_Zero()))) in isCheckForZeroAndMulWithOverflow()
67 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow() argument
70 return isCheckForZeroAndMulWithOverflow(Op0, Op1, IsAnd, Y); in isCheckForZeroAndMulWithOverflow()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineMulDivRem.cpp196 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local
198 simplifyMulInst(Op0, Op1, I.hasNoSignedWrap(), I.hasNoUnsignedWrap(), in visitMul()
221 return HasNSW ? BinaryOperator::CreateNSWNeg(Op0) in visitMul()
222 : BinaryOperator::CreateNeg(Op0); in visitMul()
264 if (Op0->hasOneUse() && match(Op1, m_NegatedPower2())) { in visitMul()
268 Negator::Negate(/*IsNegation*/ true, HasNSW, Op0, *this)) { in visitMul()
284 if (match(Op0, m_ZExtOrSExt(m_Value(X))) && in visitMul()
309 if (match(Op0, m_OneUse(m_AddLike(m_Value(X), m_ImmConstant(C1))))) { in visitMul()
312 auto *BOp0 = cast<BinaryOperator>(Op0); in visitMul()
329 if (Op0 == Op1 && match(Op0, m_Intrinsic<Intrinsic::abs>(m_Value(X)))) in visitMul()
[all …]
H A DInstCombineShifts.cpp409 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local
410 assert(Op0->getType() == Op1->getType()); in commonShiftTransforms()
417 return BinaryOperator::Create(I.getOpcode(), Op0, NewExt); in commonShiftTransforms()
425 if (isa<Constant>(Op0)) in commonShiftTransforms()
431 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I)) in commonShiftTransforms()
442 if (match(Op0, m_Constant(C)) && in commonShiftTransforms()
463 if (match(Op0, m_APInt(AC)) && match(Op1, m_Add(m_Value(A), m_APInt(AddC))) && in commonShiftTransforms()
767 Instruction *InstCombinerImpl::FoldShiftByConstant(Value *Op0, Constant *C1, in FoldShiftByConstant() argument
774 if (match(Op0, m_BinOp(I.getOpcode(), m_ImmConstant(C2), m_Value(X)))) { in FoldShiftByConstant()
777 BinaryOperator *BO0 = cast<BinaryOperator>(Op0); in FoldShiftByConstant()
[all …]
H A DInstCombineAddSub.cpp811 Value *Op0 = Add.getOperand(0), *Op1 = Add.getOperand(1); in foldNoWrapAdd() local
822 match(Op0, m_ZExt(m_NUWAddLike(m_Value(X), m_APInt(C2)))) && in foldNoWrapAdd()
829 if (Op0->hasOneUse()) in foldNoWrapAdd()
838 if (match(Op0, m_OneUse(m_SExtLike( in foldNoWrapAdd()
846 if (match(Op0, in foldNoWrapAdd()
857 Value *Op0 = Add.getOperand(0), *Op1 = Add.getOperand(1); in foldAddWithConstant() local
870 if (match(Op0, m_Sub(m_Constant(Op00C), m_Value(X)))) in foldAddWithConstant()
876 if (match(Op0, m_OneUse(m_Sub(m_Value(X), m_Value(Y)))) && in foldAddWithConstant()
881 if (match(Op0, m_ZExt(m_Value(X))) && in foldAddWithConstant()
885 if (match(Op0, m_SExt(m_Value(X))) && in foldAddWithConstant()
[all …]
H A DInstCombineAndOrXor.cpp1527 Value *Op0, Value *Op1) { in foldLogicOfIsFPClass() argument
1539 match(Op0, m_OneUse(m_Intrinsic<Intrinsic::is_fpclass>( in foldLogicOfIsFPClass()
1544 if ((((IsLHSClass || matchIsFPClassLikeFCmp(Op0, ClassVal0, ClassMask0)) && in foldLogicOfIsFPClass()
1563 auto *II = cast<IntrinsicInst>(Op0); in foldLogicOfIsFPClass()
1618 Value *Op0 = BO.getOperand(0), *Op1 = BO.getOperand(1), *X; in reassociateFCmps() local
1621 std::swap(Op0, Op1); in reassociateFCmps()
1627 if (!match(Op0, m_FCmp(Pred, m_Value(X), m_AnyZeroFP())) || Pred != NanPred || in reassociateFCmps()
1646 NewFCmpInst->copyIRFlags(Op0); in reassociateFCmps()
1665 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in matchDeMorgansLaws() local
1667 if (match(Op0, m_OneUse(m_Not(m_Value(A)))) && in matchDeMorgansLaws()
[all …]
H A DInstCombineCompares.cpp1297 Value *Op0 = Cmp.getOperand(0), *Op1 = Cmp.getOperand(1); in foldICmpWithConstant() local
1301 match(Op0, m_Add(m_Add(m_Value(A), m_Value(B)), m_ConstantInt(CI2)))) in foldICmpWithConstant()
1310 if (auto *Phi = dyn_cast<PHINode>(Op0)) in foldICmpWithConstant()
2969 static Value *createLogicFromTable(const std::bitset<4> &Table, Value *Op0, in createLogicFromTable() argument
2974 if (Op0->getType()->isVectorTy()) in createLogicFromTable()
2976 cast<VectorType>(Op0->getType())->getElementCount(), Res); in createLogicFromTable()
2984 return HasOneUse ? Builder.CreateNot(Builder.CreateOr(Op0, Op1)) : nullptr; in createLogicFromTable()
2986 return HasOneUse ? Builder.CreateAnd(Builder.CreateNot(Op0), Op1) : nullptr; in createLogicFromTable()
2988 return Builder.CreateNot(Op0); in createLogicFromTable()
2990 return HasOneUse ? Builder.CreateAnd(Op0, Builder.CreateNot(Op1)) : nullptr; in createLogicFromTable()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DConstraintElimination.cpp92 Value *Op0; member
96 : Pred(CmpInst::BAD_ICMP_PREDICATE), Op0(nullptr), Op1(nullptr) {} in ConditionTy()
97 ConditionTy(CmpInst::Predicate Pred, Value *Op0, Value *Op1) in ConditionTy()
98 : Pred(Pred), Op0(Op0), Op1(Op1) {} in ConditionTy()
139 FactOrCheck(DomTreeNode *DTN, CmpInst::Predicate Pred, Value *Op0, Value *Op1, in FactOrCheck()
141 : Cond(Pred, Op0, Op1), DoesHold(Precond), NumIn(DTN->getDFSNumIn()), in FactOrCheck()
145 Value *Op0, Value *Op1, in getConditionFact()
147 return FactOrCheck(DTN, Pred, Op0, Op1, Precond); in getConditionFact()
316 ConstraintTy getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1,
326 ConstraintTy getConstraintForSolving(CmpInst::Predicate Pred, Value *Op0,
[all …]
H A DScalarizer.cpp156 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
158 return Builder.CreateFCmp(FCI.getPredicate(), Op0, Op1, Name); in operator ()()
169 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
171 return Builder.CreateICmp(ICI.getPredicate(), Op0, Op1, Name); in operator ()()
194 Value *operator()(IRBuilder<> &Builder, Value *Op0, Value *Op1, in operator ()()
196 return Builder.CreateBinOp(BO.getOpcode(), Op0, Op1, Name); in operator ()()
645 Value *Op0 = VOp0[Frag]; in splitBinary() local
647 Res[Frag] = Split(Builder, Op0, Op1, I.getName() + ".i" + Twine(Frag)); in splitBinary()
776 Value *Op0 = VOp0[I]; in visitSelectInst() local
779 Res[I] = Builder.CreateSelect(Op0, Op1, Op2, in visitSelectInst()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTDC.cpp127 Value *Op0 = I.getOperand(0); in convertFCmp() local
134 auto &Sem = Op0->getType()->getFltSemantics(); in convertFCmp()
220 if (CallInst *CI = dyn_cast<CallInst>(Op0)) { in convertFCmp()
226 Op0 = CI->getArgOperand(0); in convertFCmp()
233 converted(&I, Op0, Mask, Worthy); in convertFCmp()
237 Value *Op0 = I.getOperand(0); in convertICmp() local
243 if (auto *Cast = dyn_cast<BitCastInst>(Op0)) { in convertICmp()
263 } else if (auto *CI = dyn_cast<CallInst>(Op0)) { in convertICmp()
292 Value *Op0, *Op1; in convertLogicOp() local
295 std::tie(Op0, Mask0, Worthy0) = ConvertedInsts[cast<Instruction>(I.getOperand(0))]; in convertLogicOp()
[all …]
H A DSystemZISelLowering.cpp41 : Op0(Op0In), Op1(Op1In), Chain(ChainIn), in Comparison()
45 SDValue Op0, Op1; member
2490 if (!C.Op0.hasOneUse() || in adjustSubwordCmp()
2491 C.Op0.getOpcode() != ISD::LOAD || in adjustSubwordCmp()
2496 auto *Load = cast<LoadSDNode>(C.Op0); in adjustSubwordCmp()
2544 if (C.Op0.getValueType() != MVT::i32 || in adjustSubwordCmp()
2546 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32, Load->getChain(), in adjustSubwordCmp()
2551 DAG.ReplaceAllUsesOfValueWith(SDValue(Load, 1), C.Op0.getValue(1)); in adjustSubwordCmp()
2586 if (C.Op0.getValueType() == MVT::i128) in shouldSwapCmpOperands()
2588 if (C.Op0.getValueType() == MVT::f128) in shouldSwapCmpOperands()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp158 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
160 Ops[1].getAsInteger(10, Op0); in parseGenericRegister()
165 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in parseGenericRegister()
172 uint32_t Op0 = (Bits >> 14) & 0x3; in genericRegisterString() local
178 return "S" + utostr(Op0) + "_" + utostr(Op1) + "_C" + utostr(CRn) + "_C" + in genericRegisterString()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DFastISel.h358 virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0);
362 virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
368 virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
376 Register fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, uint64_t Imm,
397 const TargetRegisterClass *RC, unsigned Op0);
402 const TargetRegisterClass *RC, unsigned Op0,
408 const TargetRegisterClass *RC, unsigned Op0,
414 const TargetRegisterClass *RC, unsigned Op0,
420 const TargetRegisterClass *RC, unsigned Op0,
432 const TargetRegisterClass *RC, unsigned Op0,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp485 Register Op0 = getRegForValue(I->getOperand(0)); in selectBinaryOp() local
486 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBinaryOp()
507 Register ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, Imm, in selectBinaryOp()
523 ISDOpcode, Op0, Op1); in selectBinaryOp()
1542 Register Op0 = getRegForValue(I->getOperand(0)); in selectBitCast() local
1543 if (!Op0) // Unhandled operand. Halt "fast" selection and bail. in selectBitCast()
1548 updateValueMap(I, Op0); in selectBitCast()
1553 Register ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0); in selectBitCast()
1780 const Value *Op0 = EVI->getOperand(0); in selectExtractValue() local
1781 Type *AggTy = Op0->getType(); in selectExtractValue()
[all …]
H A DTargetLowering.cpp801 SDValue Op0 = Op.getOperand(0); in SimplifyMultipleUseDemandedBits() local
804 DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
807 return Op0; in SimplifyMultipleUseDemandedBits()
812 SDValue Op0 = Op.getOperand(0); in SimplifyMultipleUseDemandedBits() local
819 Op0.getScalarValueSizeInBits() == BitWidth && in SimplifyMultipleUseDemandedBits()
820 getBooleanContents(Op0.getValueType()) == in SimplifyMultipleUseDemandedBits()
828 return Op0; in SimplifyMultipleUseDemandedBits()
834 SDValue Op0 = Op.getOperand(0); in SimplifyMultipleUseDemandedBits() local
839 return Op0; in SimplifyMultipleUseDemandedBits()
841 unsigned NumSignBits = DAG.ComputeNumSignBits(Op0, DemandedElts, Depth + 1); in SimplifyMultipleUseDemandedBits()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h233 void validateUnaryOp(const LLT Res, const LLT Op0);
234 void validateBinaryOp(const LLT Res, const LLT Op0, const LLT Op1);
235 void validateShiftOp(const LLT Res, const LLT Op0, const LLT Op1);
505 MachineInstrBuilder buildPtrAdd(const DstOp &Res, const SrcOp &Op0,
526 Register Op0,
531 MachineInstrBuilder buildPtrMask(const DstOp &Res, const SrcOp &Op0, in buildPtrMask() argument
533 return buildInstr(TargetOpcode::G_PTRMASK, {Res}, {Op0, Op1}); in buildPtrMask()
549 MachineInstrBuilder buildMaskLowPtrBits(const DstOp &Res, const SrcOp &Op0,
564 const SrcOp &Op0);
578 const SrcOp &Op0);
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFAdjustOpt.cpp107 Value *Op0 = Icmp->getOperand(0); in adjustICmpToBuiltin() local
108 if (!isa<TruncInst>(Op0)) in adjustICmpToBuiltin()
130 M, Intrinsic::bpf_compare, {Op0->getType(), ConstOp1->getType()}); in adjustICmpToBuiltin()
131 auto *NewInst = CallInst::Create(Fn, {Opcode, Op0, ConstOp1}); in adjustICmpToBuiltin()
163 Value *Op0, *Op1; in serializeICMPInBB() local
165 if (!match(&I, m_LogicalOr(m_Value(Op0), m_Value(Op1)))) in serializeICMPInBB()
167 auto *Icmp1 = dyn_cast<ICmpInst>(Op0); in serializeICMPInBB()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp184 void MachineIRBuilder::validateUnaryOp(const LLT Res, const LLT Op0) { in validateUnaryOp() argument
186 assert((Res == Op0) && "type mismatch"); in validateUnaryOp()
189 void MachineIRBuilder::validateBinaryOp(const LLT Res, const LLT Op0, in validateBinaryOp() argument
192 assert((Res == Op0 && Res == Op1) && "type mismatch"); in validateBinaryOp()
195 void MachineIRBuilder::validateShiftOp(const LLT Res, const LLT Op0, in validateShiftOp() argument
198 assert((Res == Op0) && "type mismatch"); in validateShiftOp()
202 MachineIRBuilder::buildPtrAdd(const DstOp &Res, const SrcOp &Op0, in buildPtrAdd() argument
205 Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch"); in buildPtrAdd()
208 return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}, Flags); in buildPtrAdd()
212 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0, in materializePtrAdd() argument
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td701 // Op0 Op1 CRn CRm Op2
774 // Op0 Op1 CRn CRm Op2
813 // Op0 Op1 CRn CRm Op2
824 // Op0 Op1 CRn CRm Op2
830 // Op0 Op1 CRn CRm Op2
835 // Op0 Op1 CRn CRm Op2
842 // Op0 Op1 CRn CRm Op2
879 // Op0 Op1 CRn CRm Op2
888 // Op0 Op1 CRn CRm Op2
894 // Op0 Op1 CRn CRm Op2
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PartialReduction.cpp258 Value *Op0 = getZeroExtendedVal(Sub->getOperand(0)); in trySADReplacement() local
260 if (!Op0 || !Op1) in trySADReplacement()
291 Value *Zero = Constant::getNullValue(Op0->getType()); in trySADReplacement()
292 Op0 = Builder.CreateShuffleVector(Op0, Zero, ConcatMask); in trySADReplacement()
309 Value *ExtractOp0 = Builder.CreateShuffleVector(Op0, Op0, ExtractMask); in trySADReplacement()
310 Value *ExtractOp1 = Builder.CreateShuffleVector(Op1, Op0, ExtractMask); in trySADReplacement()
H A DX86FloatingPoint.cpp1358 unsigned Op0 = getFPReg(MI.getOperand(NumOperands - 2)); in handleTwoArgFP() local
1360 bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0, /*TRI=*/nullptr); in handleTwoArgFP()
1368 if (Op0 != TOS && Op1 != TOS) { // No operand at TOS? in handleTwoArgFP()
1373 moveToTop(Op0, I); // Move dead operand to TOS. in handleTwoArgFP()
1374 TOS = Op0; in handleTwoArgFP()
1384 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1385 Op0 = TOS = Dest; in handleTwoArgFP()
1392 duplicateToTop(Op0, Dest, I); in handleTwoArgFP()
1393 Op0 = TOS = Dest; in handleTwoArgFP()
1399 assert((TOS == Op0 || TOS == Op1) && (KillsOp0 || KillsOp1) && in handleTwoArgFP()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DPatternMatch.h2547 m_MaskedLoad(const Opnd0 &Op0, const Opnd1 &Op1, const Opnd2 &Op2,
2549 return m_Intrinsic<Intrinsic::masked_load>(Op0, Op1, Op2, Op3);
2555 m_MaskedGather(const Opnd0 &Op0, const Opnd1 &Op1, const Opnd2 &Op2,
2557 return m_Intrinsic<Intrinsic::masked_gather>(Op0, Op1, Op2, Op3);
2561 inline typename m_Intrinsic_Ty<T0>::Ty m_Intrinsic(const T0 &Op0) {
2562 return m_CombineAnd(m_Intrinsic<IntrID>(), m_Argument<0>(Op0));
2566 inline typename m_Intrinsic_Ty<T0, T1>::Ty m_Intrinsic(const T0 &Op0,
2568 return m_CombineAnd(m_Intrinsic<IntrID>(Op0), m_Argument<1>(Op1));
2573 m_Intrinsic(const T0 &Op0, const T1 &Op1, const T2 &Op2) {
2574 return m_CombineAnd(m_Intrinsic<IntrID>(Op0, Op1), m_Argument<2>(Op2));
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DOverflowInstAnalysis.h38 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd,
40 bool isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd);
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp307 auto Op0 = N->getOperand(0); in selectAddCarry() local
318 {Op0, Op1, SDValue(CA, 0)}); in selectAddCarry()
324 {Op0, Op1, SDValue(CA, 0)}); in selectAddCarry()
328 Dl, {Type0, Type1}, {Op0, Op1, Op2}); in selectAddCarry()
350 auto Op0 = N->getOperand(0); in selectSubCarry() local
361 {Op0, Op1, SDValue(CA, 0)}); in selectSubCarry()
367 {Op0, Op1, SDValue(CA, 0)}); in selectSubCarry()
372 Dl, {Type0, Type1}, {Op0, Op1, CarryIn}); in selectSubCarry()

12345678