| /freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 473 unsigned Ones = countTrailingOnesSlowCase(); in isMask() local
474 return (numBits == Ones) && in isMask()
475 ((Ones + countLeadingZerosSlowCase()) == BitWidth); in isMask()
484 unsigned Ones = countTrailingOnesSlowCase(); in isMask() local
485 return (Ones > 0) && ((Ones + countLeadingZerosSlowCase()) == BitWidth); in isMask()
493 unsigned Ones = countPopulationSlowCase(); in isShiftedMask() local
495 return (Ones + LeadZ + countr_zero()) == BitWidth; in isShiftedMask()
505 unsigned Ones = countPopulationSlowCase(); in isShiftedMask() local
508 if ((Ones + LeadZ + TrailZ) != BitWidth) in isShiftedMask()
510 MaskLen = Ones; in isShiftedMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 407 bool evaluateCLBr(const RegisterSubReg &R1, bool Zeros, bool Ones,
409 bool evaluateCLBi(const APInt &A1, bool Zeros, bool Ones, APInt &Result);
410 bool evaluateCTBr(const RegisterSubReg &R1, bool Zeros, bool Ones,
412 bool evaluateCTBi(const APInt &A1, bool Zeros, bool Ones, APInt &Result);
1662 bool Ones, const CellMap &Inputs, LatticeCell &Result) { in evaluateCLBr() argument
1673 evaluateCLBi(A, Zeros, Ones, CA); in evaluateCLBr()
1683 bool Ones, APInt &Result) { in evaluateCLBi() argument
1685 if (!Zeros && !Ones) in evaluateCLBi()
1690 if (Ones && (Count == 0)) in evaluateCLBi()
1697 bool Ones, cons in evaluateCTBr() argument
1718 evaluateCTBi(const APInt & A1,bool Zeros,bool Ones,APInt & Result) evaluateCTBi() argument
2090 bool Ones = (Opc == S2_ct1) || (Opc == S2_ct1p); evaluate() local
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorOps.cpp | 1485 SDValue Ones = DAG.getAllOnesConstant(DL, VT); in ExpandVP_SELECT() local
1486 SDValue NotMask = DAG.getNode(ISD::VP_XOR, DL, VT, Mask, Ones, Ones, EVL); in ExpandVP_SELECT()
1488 Op1 = DAG.getNode(ISD::VP_AND, DL, VT, Op1, Mask, Ones, EVL); in ExpandVP_SELECT()
1489 Op2 = DAG.getNode(ISD::VP_AND, DL, VT, Op2, NotMask, Ones, EVL); in ExpandVP_SELECT()
1490 return DAG.getNode(ISD::VP_OR, DL, VT, Op1, Op2, Ones, EVL); in ExpandVP_SELECT()
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| H A D | TargetLowering.cpp | 1622 APInt Ones = APInt::getAllOnes(BitWidth); in SimplifyDemandedBits() local
1623 Ones = Op0Opcode == ISD::SHL ? Ones.shl(ShiftAmt) in SimplifyDemandedBits()
1624 : Ones.lshr(ShiftAmt); in SimplifyDemandedBits()
1626 if ((DemandedBits & C->getAPIntValue()) == (DemandedBits & Ones) && in SimplifyDemandedBits()
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| H A D | DAGCombiner.cpp | 13415 SDValue Ones = SetCC.getOperand(1); in foldExtendedSignBitTest() local
13422 if (CC == ISD::SETGT && isAllOnesConstant(Ones) && VT == XVT) { in foldExtendedSignBitTest()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1952 auto Ones = MIRBuilder.buildConstant(VTy, 1); in legalizeCTPOP() local
1957 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
1960 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
1962 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstructionCombining.cpp | 1642 Constant *Ones = ConstantInt::getAllOnesValue(BO.getType()); in foldBinopOfSextBoolToSelect() local
1644 Value *TVal = Builder.CreateBinOp(BO.getOpcode(), Ones, C); in foldBinopOfSextBoolToSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips64InstrInfo.td | 563 // Count Ones in a Word/Doubleword
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| H A D | MipsInstrInfo.td | 1758 // Count Leading Ones/Zeros in Word
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| /freebsd/sys/contrib/dev/acpica/ |
| H A D | changes.txt | 3085 0xFFFFFFFF, the "Ones" value is now returned, which is 0xFFFFFFFFFFFFFFFF
7472 objects. 1) properly handle constants like One, Ones, Zero -- do not make
8767 using the keywords "Zero", "One", or "Ones". Lin Ming.
14821 length parameter was inadvertently changed from zero to Ones.
14873 "Ones"
14874 was not returned for the TRUE case. Changed the code to return Ones
14921 returning 1 in the TRUE case, not Ones as per the ACPI specification.
17321 Fixed a problem where the Ones opcode could get converted to a
17322 value of zero if "Ones" was used where a byte, word or dword value
17412 (Zero, One, Ones, Revision).
[all …]
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| /freebsd/sys/dev/aic7xxx/ |
| H A D | aic79xx.reg | 3320 * All Ones
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2201 uint64_t Ones = (Sum + Carry) & NonDemandedBits; in optimizeLogicalImm() local
2202 NewImm = (Imm | Ones) & Mask; in optimizeLogicalImm()
10105 SDValue Ones = DAG.getConstant(1, DL, VT8Bit); in LowerCTPOP_PARITY() local
10108 Val = DAG.getNode(AArch64ISD::UDOT, DL, DT, Zeros, Ones, Val); in LowerCTPOP_PARITY()
10111 Val = DAG.getNode(AArch64ISD::UDOT, DL, DT, Zeros, Ones, Val); in LowerCTPOP_PARITY()
10113 Val = DAG.getNode(AArch64ISD::UDOT, DL, DT, Zeros, Ones, Val); in LowerCTPOP_PARITY()
17610 SDValue Ones = N->getOperand(1); in foldVectorXorShiftIntoCmp() local
17612 !ISD::isBuildVectorAllOnes(Ones.getNode())) in foldVectorXorShiftIntoCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 10578 SDValue Ones = DAG.getSplatVector(IdxVT, DL, DAG.getConstant(1, DL, XLenVT)); in lowerVECTOR_INTERLEAVE() local
10581 SDValue OddMask = DAG.getNode(ISD::AND, DL, IdxVT, StepVec, Ones); in lowerVECTOR_INTERLEAVE()
10591 SDValue Idx = DAG.getNode(ISD::SRL, DL, IdxVT, StepVec, Ones); in lowerVECTOR_INTERLEAVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 50923 SDValue Ones = N->getOperand(1); in foldVectorXorShiftIntoCmp() local
50925 !ISD::isBuildVectorAllOnes(Ones.getNode())) in foldVectorXorShiftIntoCmp()
50937 return DAG.getSetCC(SDLoc(N), VT, Shift.getOperand(0), Ones, ISD::SETGT); in foldVectorXorShiftIntoCmp()
56031 APInt Ones = APInt::getAllOnes(EltBits); in combineVectorCompare() local
56036 Results[I] = (LHSBits[I] == RHSBits[I]) ? Ones : Zero; in combineVectorCompare()
56039 Results[I] = (!AnyUndef && LHSBits[I].sgt(RHSBits[I])) ? Ones : Zero; in combineVectorCompare()
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