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Searched refs:Odd (Results 1 – 25 of 30) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp356 static MCRegister getPairedGPR(MCRegister Reg, bool Odd, in getPairedGPR() argument
360 return RI->getSubReg(Super, Odd ? ARM::gsub_1 : ARM::gsub_0); in getPairedGPR()
372 unsigned Odd; in getRegAllocationHints() local
375 Odd = 0; in getRegAllocationHints()
378 Odd = 1; in getRegAllocationHints()
400 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
409 if (Reg == PairedPhys || (getEncodingValue(Reg) & 1) != Odd) in getRegAllocationHints()
412 MCRegister Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints()
H A DARMInstrFormats.td2789 let ParserMatchClass = ComplexRotationOperand<180, 90, "Odd", "90 or 270">;
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td74 // Even or an Odd queue. The EXECE represents the even queues and the EXECO
83 //Odd Exec Ports
88 // Four ALU (Fixed Point Arithmetic) units in total. Two even, two Odd.
95 //Odd ALU pipelines
102 // Four DP (Floating Point) units in total. Two even, two Odd.
109 //Odd DP pipelines
H A DREADME_P9.txt196 - Round to Odd of QP Add/Divide/Multiply/Subtract/Square-Root:
245 - Round to Odd of QP (Negative) Multiply-{Add/Subtract}:
H A DP9InstrResources.td913 // as well as both the Even and Odd exec pipelines.
H A DPPCInstrVSX.td181 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /]
199 // [PO VRT XO VRB XO RO], Round to Odd version of [PO VRT XO VRB XO /]
229 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /]
241 // [PO VRT VRA VRB XO RO], Round to Odd version of [PO VRT VRA VRB XO /]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp101 enum class Color { Even, Odd }; enumerator
257 return OverrideBalance == 1 ? Color::Even : Color::Odd; in getPreferredColor()
463 Color PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
488 PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
715 return Color::Odd; in getColor()
H A DAArch64ISelLowering.cpp14973 bool Odd = false; in LowerBUILD_VECTOR() local
14981 Odd = false; in LowerBUILD_VECTOR()
14995 Odd = false; in LowerBUILD_VECTOR()
15008 Odd = true; in LowerBUILD_VECTOR()
15013 Odd = false; in LowerBUILD_VECTOR()
15017 if (Even || Odd) { in LowerBUILD_VECTOR()
15025 if (Even && !Odd) in LowerBUILD_VECTOR()
15027 if (Odd && !Even) in LowerBUILD_VECTOR()
29611 SDValue Odd = DAG.getNode(AArch64ISD::UZP2, DL, OpVT, Op.getOperand(0), in LowerVECTOR_DEINTERLEAVE() local
29613 return DAG.getMergeValues({Even, Odd}, DL); in LowerVECTOR_DEINTERLEAVE()
/freebsd/contrib/llvm-project/lldb/include/lldb/Host/
H A DTerminal.h24 Odd,
25 Odd, global() enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.h418 uint64_t Odd = Mask & 0x5555555555555555ULL; in getNumCoveredRegs() local
419 return llvm::popcount(Odd); in getNumCoveredRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp854 auto Odd = static_cast<int>(TakeOdd); in vpack() local
858 Vd[i * Size + b] = Vv[(2 * i + Odd) * Size + b]; in vpack()
859 Vd[i * Size + b + Len / 2] = Vu[(2 * i + Odd) * Size + b]; in vpack()
869 auto Odd = static_cast<int>(TakeOdd); in vshuff() local
872 Vd[(2 * i + 0) * Size + b] = Vv[(2 * i + Odd) * Size + b]; in vshuff()
873 Vd[(2 * i + 1) * Size + b] = Vu[(2 * i + Odd) * Size + b]; in vshuff()
2109 auto [Size, Odd] = Packs[i]; in contracting()
2110 if (same(SM.Mask, shuffles::mask(shuffles::vpack, HwLen, Size, Odd))) { in contracting()
2125 auto [Size, Odd] = Packs[i]; in contracting()
2126 if (same(SM.Mask, shuffles::mask(shuffles::vshuff, HwLen, Size, Odd))) { in contracting()
[all …]
H A DHexagonBitTracker.cpp287 uint16_t BW, bool Odd) -> BT::RegisterCell { in evaluate() argument
288 uint16_t I = Odd, Ws = Rs.width(); in evaluate()
/freebsd/contrib/llvm-project/lldb/source/Host/common/
H A DTerminal.cpp339 if (parity == Parity::Odd || parity == Parity::Mark) in SetParity()
H A DFile.cpp827 .Case("odd", Terminal::Parity::Odd) in OptionsFromURL()
/freebsd/libexec/getty/
H A Dgettytab143 # Odd special case terminals
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVSystemOperands.td335 // pmpcfg0-pmpcfg15 at 0x3A0-0x3AF. Odd-numbered registers are RV32-only.
H A DRISCVRegisterInfo.td318 // Even-Odd GPR Pairs
H A DRISCVISelLowering.cpp11903 SDValue Odd = lowerVZIP(RISCVISD::RI_VUNZIP2B_VL, Src, in lowerVECTOR_DEINTERLEAVE() local
11906 Odd = DAG.getExtractSubvector(DL, VT, Odd, 0); in lowerVECTOR_DEINTERLEAVE()
11907 return DAG.getMergeValues({Even, Odd}, DL); in lowerVECTOR_DEINTERLEAVE()
11915 SDValue Odd = in lowerVECTOR_DEINTERLEAVE() local
11917 return DAG.getMergeValues({Even, Odd}, DL); in lowerVECTOR_DEINTERLEAVE()
11936 SDValue Odd = getDeinterleaveShiftAndTrunc(DL, VecVT, Concat, 2, 1, DAG); in lowerVECTOR_DEINTERLEAVE() local
11937 return DAG.getMergeValues({Even, Odd}, DL); in lowerVECTOR_DEINTERLEAVE()
11964 SDValue Odd = DAG.getExtractSubvector(DL, VecVT, OddWide, 0); in lowerVECTOR_DEINTERLEAVE() local
11966 return DAG.getMergeValues({Even, Odd}, DL); in lowerVECTOR_DEINTERLEAVE()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1630 MCRegister Odd = MRI.getSubReg(Reg, Subo); in printGPRSeqPairsClassOperand() local
1633 printRegName(O, Odd); in printGPRSeqPairsClassOperand()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DAutoUpgrade.cpp4028 Value *Odd = Builder.CreateCall(FMA, Ops); in upgradeX86IntrinsicCall() local
4033 std::swap(Even, Odd); in upgradeX86IntrinsicCall()
4039 Rep = Builder.CreateShuffleVector(Even, Odd, Idxs); in upgradeX86IntrinsicCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3571 SDValue &Even, SDValue &Odd) { in lowerGR128Binary() argument
3575 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
4570 SDValue Even, Odd; in lowerMULH() local
4579 Op.getOperand(0), Op.getOperand(1), Even, Odd); in lowerMULH()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/TargetBuiltins/
H A DARM.cpp3417 static llvm::Value *VectorUnzip(CGBuilderTy &Builder, llvm::Value *V, bool Odd) { in VectorUnzip() argument
3424 Indices.push_back(i + Odd); in VectorUnzip()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrCompiler.td1528 // Odd encoding trick: -128 fits into an 8-bit immediate field while
/freebsd/contrib/unbound/doc/
H A Dunbound.conf.rst1584 Odd (nonprintable) characters in names are printed as ``'?'``.
1595 Odd (nonprintable) characters in names are printed as ``'?'``.
/freebsd/sys/contrib/edk2/
H A DMdePkg.dec2570 # 3 - Odd Parity.<BR>

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