| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 1064 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT() argument
1096 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdownMVT()
1452 unsigned NumIntermediates; in computeRegisterProperties() local
1454 NumIntermediates, RegisterVT, this); in computeRegisterProperties()
1519 unsigned &NumIntermediates, in getVectorTypeBreakdown() argument
1535 NumIntermediates = 1; in getVectorTypeBreakdown()
1561 NumIntermediates = in getVectorTypeBreakdown()
1566 return NumIntermediates; in getVectorTypeBreakdown()
1584 NumIntermediates = NumVectorRegs; in getVectorTypeBreakdown()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 1173 unsigned &NumIntermediates,
1181 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
1182 return getVectorTypeBreakdown(Context, VT, IntermediateVT, NumIntermediates, in getVectorTypeBreakdownForCallingConv()
1723 unsigned NumIntermediates; in getRegisterType() local
1725 NumIntermediates, RegisterVT); in getRegisterType()
1756 unsigned NumIntermediates; variable
1757 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLoweringCall.cpp | 174 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
183 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
184 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
192 NumIntermediates = 2; in getVectorTypeBreakdownForCallingConv()
201 NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
|
| H A D | X86ISelLowering.h | 1538 unsigned &NumIntermediates, MVT &RegisterVT) const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 357 unsigned NumIntermediates; in getCopyFromPartsVector() local
363 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
367 NumIntermediates, RegisterVT); in getCopyFromPartsVector()
378 SmallVector<SDValue, 8> Ops(NumIntermediates); in getCopyFromPartsVector()
379 if (NumIntermediates == NumParts) { in getCopyFromPartsVector()
388 assert(NumParts % NumIntermediates == 0 && in getCopyFromPartsVector()
390 unsigned Factor = NumParts / NumIntermediates; in getCopyFromPartsVector()
391 for (unsigned i = 0; i != NumIntermediates; ++i) in getCopyFromPartsVector()
405 NumIntermediates); in getCopyFromPartsVector()
762 unsigned NumIntermediates; in getCopyToPartsVector() local
[all …]
|
| H A D | SelectionDAG.cpp | 2478 unsigned NumIntermediates; in getReducedAlign() local
2480 NumIntermediates, RegisterVT); in getReducedAlign()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.h | 308 unsigned &NumIntermediates, MVT &RegisterVT) const override;
|
| H A D | MipsISelLowering.cpp | 126 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
130 NumIntermediates = getNumRegistersForCallingConv(Context, CC, VT); in getVectorTypeBreakdownForCallingConv()
131 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
134 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
136 return NumIntermediates * getNumRegisters(Context, IntermediateVT); in getVectorTypeBreakdownForCallingConv()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.h | 45 unsigned &NumIntermediates, MVT &RegisterVT) const override;
|
| H A D | SIISelLowering.cpp | 1062 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
1078 NumIntermediates = (NumElts + 1) / 2; in getVectorTypeBreakdownForCallingConv()
1079 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1085 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1086 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1093 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1094 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1101 NumIntermediates = NumElts; in getVectorTypeBreakdownForCallingConv()
1102 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
1108 NumIntermediates = NumElts * ((Size + 31) / 32); in getVectorTypeBreakdownForCallingConv()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 549 unsigned &NumIntermediates,
|
| H A D | RISCVISelLowering.cpp | 2370 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
2372 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
2369 getVectorTypeBreakdownForCallingConv(LLVMContext & Context,CallingConv::ID CC,EVT VT,EVT & IntermediateVT,unsigned & NumIntermediates,MVT & RegisterVT) const getVectorTypeBreakdownForCallingConv() argument
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.h | 1020 unsigned &NumIntermediates,
|
| H A D | AArch64ISelLowering.cpp | 28633 unsigned NumIntermediates; in getRegisterTypeForCallingConv() local
28634 getVectorTypeBreakdownForCallingConv(Context, CC, VT, VT1, NumIntermediates, in getRegisterTypeForCallingConv()
28648 unsigned NumIntermediates; in getNumRegistersForCallingConv() local
28650 NumIntermediates, VT2); in getNumRegistersForCallingConv()
28655 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv() argument
28657 Context, CC, VT, IntermediateVT, NumIntermediates, RegisterVT); in getVectorTypeBreakdownForCallingConv()
28675 NumIntermediates = VT.getVectorNumElements(); in getVectorTypeBreakdownForCallingConv()
28677 return NumIntermediates; in getVectorTypeBreakdownForCallingConv()
28684 NumIntermediates *= NumSubRegs; in getVectorTypeBreakdownForCallingConv()
|