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Searched refs:NumCycles (Results 1 – 23 of 23) sorted by relevance

/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DDispatchStatistics.cpp41 double Percentage = ((double)Entry.second / NumCycles) * 100.0; in printDispatchHistogram()
52 unsigned NumCycles) { in printStalls() argument
58 double Percentage = ((double)NumStalls / NumCycles) * 100.0; in printStalls()
68 printStalls(SS, HWStalls[HWStallEvent::RegisterFileStall], NumCycles); in printDispatchStalls()
70 printStalls(SS, HWStalls[HWStallEvent::RetireControlUnitStall], NumCycles); in printDispatchStalls()
72 printStalls(SS, HWStalls[HWStallEvent::SchedulerQueueFull], NumCycles); in printDispatchStalls()
74 printStalls(SS, HWStalls[HWStallEvent::LoadQueueFull], NumCycles); in printDispatchStalls()
76 printStalls(SS, HWStalls[HWStallEvent::StoreQueueFull], NumCycles); in printDispatchStalls()
78 printStalls(SS, HWStalls[HWStallEvent::DispatchGroupStall], NumCycles); in printDispatchStalls()
80 printStalls(SS, HWStalls[HWStallEvent::CustomBehaviourStall], NumCycles); in printDispatchStalls()
H A DRetireControlUnitStatistics.cpp21 : NumRetired(0), NumCycles(0), EntriesInUse(0), MaxUsedEntries(0), in RetireControlUnitStatistics()
50 ++NumCycles; in onCycleEnd()
69 << format("%.1f", ((double)Entry.second / NumCycles) * 100.0) in printView()
73 unsigned AvgUsage = (double)SumOfUsedEntries / NumCycles; in printView()
H A DDispatchStatistics.h46 unsigned NumCycles; variable
66 : NumDispatched(0), NumCycles(0), in DispatchStatistics()
73 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
H A DSchedulerStatistics.cpp23 NumCycles(0), MostRecentLoadDispatched(~0U), in SchedulerStatistics()
116 << format("%.1f", ((double)IPC / NumCycles) * 100) << "%)\n"; in printSchedulerStats()
123 assert(NumCycles && "Unexpected number of cycles!"); in printSchedulerUsage()
145 double AvgUsage = (double)BU.CumulativeNumUsedSlots / NumCycles; in printSchedulerUsage()
H A DSchedulerStatistics.h53 unsigned NumCycles; variable
77 void onCycleBegin() override { NumCycles++; } in onCycleBegin()
H A DRetireControlUnitStatistics.h43 unsigned NumCycles; variable
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DEarlyIfConversion.cpp1168 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1169 if (NumCycles > 1) in shouldConvertIf()
1170 Cycles += NumCycles - 1; in shouldConvertIf()
1182 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1183 if (NumCycles > 1) in shouldConvertIf()
1184 TCycle += NumCycles - 1; in shouldConvertIf()
1188 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf() local
1189 if (NumCycles > 1) in shouldConvertIf()
1190 FCycle += NumCycles - 1; in shouldConvertIf()
H A DIfConversion.cpp1120 unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false); in ScanInstructions() local
1121 if (NumCycles > 1) in ScanInstructions()
1122 BBI.ExtraCost += NumCycles-1; in ScanInstructions()
2180 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in CopyAndPredicateBlock() local
2181 if (NumCycles > 1) in CopyAndPredicateBlock()
2182 ToBBI.ExtraCost += NumCycles-1; in CopyAndPredicateBlock()
H A DMachinePipeliner.cpp3667 unsigned NumCycles = DAG->getSUnit(MI)->Latency; in calculateResMIIDFA() local
3672 dbgs() << "Trying to reserve resource for " << NumCycles in calculateResMIIDFA()
3676 for (unsigned C = 0; C < NumCycles; ++C) in calculateResMIIDFA()
3686 << ", NumCycles:" << NumCycles << "\n"); in calculateResMIIDFA()
3688 for (unsigned C = ReservedCycles; C < NumCycles; ++C) { in calculateResMIIDFA()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h183 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
186 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
H A DR600InstrInfo.cpp872 unsigned NumCycles, in isProfitableToIfCvt() argument
891 unsigned NumCycles, in isProfitableToDupForIfCvt() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.h265 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
273 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
H A DSystemZInstrInfo.cpp771 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
785 return NumCycles == 1; in isProfitableToIfCvt()
799 isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
802 return NumCycles == 1; in isProfitableToDupForIfCvt()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h142 bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
164 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles,
H A DHexagonInstrInfo.cpp821 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h272 unsigned NumCycles, unsigned ExtraPredCycles,
280 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
282 return NumCycles == 1; in isProfitableToDupForIfCvt()
H A DARMScheduleA9.td2038 foreach NumCycles = 2-8 in {
2039 def A9WriteCycle#NumCycles : WriteSequence<[A9WriteCycle1], NumCycles>;
2040 } // foreach NumCycles
H A DARMBaseInstrInfo.cpp2097 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
2099 if (!NumCycles) in isProfitableToIfCvt()
2117 return isProfitableToIfCvt(MBB, NumCycles, ExtraPredCycles, in isProfitableToIfCvt()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h507 unsigned NumCycles, unsigned ExtraPredCycles, in isProfitableToIfCvt() argument
518 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToDupForIfCvt() argument
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h855 virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, in isProfitableToIfCvt() argument
882 unsigned NumCycles, in isProfitableToDupForIfCvt() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedOryon.td207 // All definitions follow the format: ORYONWrite_<NumCycles>Cyc_<Resources>.
H A DAArch64SchedThunderX2T99.td93 // All definitions follow the format: THX2T99Write_<NumCycles>Cyc_<Resources>.
H A DAArch64SchedThunderX3T110.td117 // All definitions follow the format: THX3T110Write_<NumCycles>Cyc_<Resources>.