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Searched refs:NewReg (Results 1 – 25 of 78) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyPeephole.cpp60 /// If desirable, rewrite NewReg to a drop register.
61 static bool maybeRewriteToDrop(unsigned OldReg, unsigned NewReg, in maybeRewriteToDrop() argument
65 if (OldReg == NewReg) { in maybeRewriteToDrop()
67 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in maybeRewriteToDrop() local
68 MO.setReg(NewReg); in maybeRewriteToDrop()
70 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToDrop()
100 Register NewReg = MRI.createVirtualRegister(RegClass); in maybeRewriteToFallthrough() local
101 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) in maybeRewriteToFallthrough()
103 MO.setReg(NewReg); in maybeRewriteToFallthrough()
104 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToFallthrough()
147 Register NewReg = Op2.getReg(); runOnMachineFunction() local
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H A DWebAssemblyExplicitLocals.cpp338 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local
340 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg) in runOnMachineFunction()
342 MI.getOperand(2).setReg(NewReg); in runOnMachineFunction()
343 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction()
367 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local
373 .addReg(NewReg); in runOnMachineFunction()
386 .addReg(NewReg); in runOnMachineFunction()
391 Def.setReg(NewReg); in runOnMachineFunction()
393 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction()
439 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local
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H A DWebAssemblyDebugValueManager.cpp355 Register NewReg, in cloneSink() argument
371 if (NewReg != CurrentReg && NewReg.isValid()) in cloneSink()
372 Clone->getOperand(0).setReg(NewReg); in cloneSink()
387 if (NewReg != CurrentReg && NewReg.isValid()) in cloneSink()
390 MO.setReg(NewReg); in cloneSink()
H A DWebAssemblyRegStackify.cpp568 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in moveForSingleUse() local
569 Op.setReg(NewReg); in moveForSingleUse()
570 DefDIs.updateReg(NewReg); in moveForSingleUse()
574 LIS->createAndComputeVirtRegInterval(NewReg); in moveForSingleUse()
583 MFI.stackifyVReg(MRI, NewReg); in moveForSingleUse()
611 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in rematerializeCheapDef() local
612 DefDIs.cloneSink(&*Insert, NewReg); in rematerializeCheapDef()
613 Op.setReg(NewReg); in rematerializeCheapDef()
617 LIS.createAndComputeVirtRegInterval(NewReg); in rematerializeCheapDef()
618 MFI.stackifyVReg(MRI, NewReg); in rematerializeCheapDef()
H A DWebAssemblyDebugValueManager.h44 void cloneSink(MachineInstr *Insert, Register NewReg = Register(),
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCriticalAntiDepBreaker.cpp355 MCRegister NewReg) { in isNewRegClobberedByRefs() argument
368 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs()
372 CheckOper.getReg() != NewReg) in isNewRegClobberedByRefs()
399 for (MCRegister NewReg : Order) { in findSuitableFreeRegister() local
401 if (NewReg == AntiDepReg) continue; in findSuitableFreeRegister()
405 if (NewReg == LastNewReg) continue; in findSuitableFreeRegister()
409 if (isNewRegClobberedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue; in findSuitableFreeRegister()
415 assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) in findSuitableFreeRegister()
417 if (KillIndices[NewReg] != ~0u || in findSuitableFreeRegister()
418 Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) || in findSuitableFreeRegister()
[all …]
H A DAggressiveAntiDepBreaker.cpp642 MCRegister NewReg; in FindSuitableFreeRegisters() local
644 NewReg = NewSuperReg; in FindSuitableFreeRegisters()
648 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters()
651 LLVM_DEBUG(dbgs() << " " << printReg(NewReg, TRI)); in FindSuitableFreeRegisters()
654 if (!RenameRegisterMap[Reg].test(NewReg)) { in FindSuitableFreeRegisters()
663 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) { in FindSuitableFreeRegisters()
668 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters()
686 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, TRI, false, true); in FindSuitableFreeRegisters()
704 if (DefMI->readsRegister(NewReg, TRI)) { in FindSuitableFreeRegisters()
711 RenameMap.insert(std::make_pair(Reg, NewReg)); in FindSuitableFreeRegisters()
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H A DModuloSchedule.cpp411 Register NewReg = VRMap[PrevStage][LoopVal]; in generateExistingPhis() local
413 InitVal, NewReg); in generateExistingPhis()
429 Register NewReg; in generateExistingPhis() local
531 NewReg = PhiOp2; in generateExistingPhis()
538 NewReg = VRMap[ReuseStage - np][LoopVal]; in generateExistingPhis()
541 Def, NewReg); in generateExistingPhis()
543 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis()
544 PhiOp2 = NewReg; in generateExistingPhis()
549 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI); in generateExistingPhis()
560 NewReg = MRI.createVirtualRegister(RC); in generateExistingPhis()
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H A DMachineCSE.cpp631 Register NewReg = CSMI->getOperand(i).getReg(); in ProcessBlockCSE() local
640 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlockCSE()
643 if (OldReg == NewReg) { in ProcessBlockCSE()
648 assert(OldReg.isVirtual() && NewReg.isVirtual() && in ProcessBlockCSE()
651 if (!isProfitableToCSE(NewReg, OldReg, CSMI->getParent(), &MI)) { in ProcessBlockCSE()
660 if (!MRI->constrainRegAttrs(NewReg, OldReg)) { in ProcessBlockCSE()
667 CSEPairs.emplace_back(OldReg, NewReg); in ProcessBlockCSE()
675 Register NewReg = CSEPair.second; in ProcessBlockCSE() local
677 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlockCSE()
679 Def->clearRegisterDeads(NewReg); in ProcessBlockCSE()
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H A DInitUndef.cpp190 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in handleSubReg() local
192 TII->get(TargetOpcode::INSERT_SUBREG), NewReg) in handleSubReg()
196 LatestReg = NewReg; in handleSubReg()
213 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in fixupIllOperand() local
215 TII->get(TargetOpcode::INIT_UNDEF), NewReg); in fixupIllOperand()
216 MO.setReg(NewReg); in fixupIllOperand()
H A DTailDuplicator.cpp339 void TailDuplicator::addSSAUpdateEntry(Register OrigReg, Register NewReg, in addSSAUpdateEntry() argument
344 LI->second.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry()
347 Vals.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry()
413 Register NewReg = MRI->createVirtualRegister(RC); in duplicateInstruction() local
414 MO.setReg(NewReg); in duplicateInstruction()
415 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
417 addSSAUpdateEntry(Reg, NewReg, PredBB); in duplicateInstruction()
462 Register NewReg = MRI->createVirtualRegister(OrigRC); in duplicateInstruction() local
464 NewReg) in duplicateInstruction()
467 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYRegisterInfo.cpp199 Register NewReg = STI.hasE2() in eliminateFrameIndex() local
203 auto *Temp = BuildMI(MBB, II, DL, TII->get(CSKY::LD32W), NewReg) in eliminateFrameIndex()
210 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
219 Register NewReg; in eliminateFrameIndex() local
221 NewReg = MRI.createVirtualRegister(&CSKY::GPRRegClass); in eliminateFrameIndex()
222 BuildMI(MBB, II, DL, TII->get(CSKY::MVC32), NewReg) in eliminateFrameIndex()
225 NewReg = MRI.createVirtualRegister(&CSKY::mGPRRegClass); in eliminateFrameIndex()
226 BuildMI(MBB, II, DL, TII->get(CSKY::MOVI16), NewReg).addImm(0); in eliminateFrameIndex()
228 .addReg(NewReg, RegState::Define) in eliminateFrameIndex()
230 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DAntiDepBreaker.h59 void UpdateDbgValue(MachineInstr &MI, MCRegister OldReg, MCRegister NewReg) { in UpdateDbgValue() argument
63 MI.getDebugOperand(0).setReg(NewReg); in UpdateDbgValue()
67 MI.getOperand(0).setReg(NewReg); in UpdateDbgValue()
76 MCRegister OldReg, MCRegister NewReg) { in UpdateDbgValues() argument
84 UpdateDbgValue(*DbgMI, OldReg, NewReg); in UpdateDbgValues()
H A DMachineRegisterInfo.h62 virtual void MRI_NoteCloneVirtualRegister(Register NewReg, in MRI_NoteCloneVirtualRegister() argument
64 MRI_NoteNewVirtualRegister(NewReg); in MRI_NoteCloneVirtualRegister()
184 void noteCloneVirtualRegister(Register NewReg, Register SrcReg) { in noteCloneVirtualRegister() argument
186 TheDelegate->MRI_NoteCloneVirtualRegister(NewReg, SrcReg); in noteCloneVirtualRegister()
866 void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg, in updateDbgUsersToReg() argument
870 auto UpdateOp = [this, &NewReg, &OldReg](MachineOperand &Op) { in updateDbgUsersToReg()
873 Op.setReg(NewReg); in updateDbgUsersToReg()
882 assert(MI->hasDebugOperandForReg(NewReg) && in updateDbgUsersToReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegBankSelect.cpp137 Register NewReg = MRI.createVirtualRegister({RB, Ty}); in reAssignRegBankOnDef() local
138 DefOP.setReg(NewReg); in reAssignRegBankOnDef()
142 B.buildCopy(Reg, NewReg); in reAssignRegBankOnDef()
158 Op.setReg(NewReg); in reAssignRegBankOnDef()
173 Register NewReg = MRI.createVirtualRegister({RB, Ty}); in constrainRegBankUse() local
174 UseOP.setReg(NewReg); in constrainRegBankUse()
184 B.buildCopy(NewReg, Reg); in constrainRegBankUse()
H A DGCNRewritePartialRegUses.cpp89 void updateLiveIntervals(Register OldReg, Register NewReg,
334 Register OldReg, Register NewReg, SubRegMap &SubRegs) const { in updateLiveIntervals() argument
339 auto &NewLI = LIS->createEmptyInterval(NewReg); in updateLiveIntervals()
369 LIS->removeInterval(NewReg); in updateLiveIntervals()
370 LIS->createAndComputeVirtRegInterval(NewReg); in updateLiveIntervals()
411 Register NewReg = MRI->createVirtualRegister(NewRC); in rewriteReg() local
414 << printReg(NewReg, TRI) << ':' in rewriteReg()
418 MO.setReg(NewReg); in rewriteReg()
430 updateLiveIntervals(Reg, NewReg, SubRegs); in rewriteReg()
H A DSIOptimizeVGPRLiveRange.cpp130 Register Reg, Register NewReg, MachineBasicBlock *Flow,
475 Register Reg, Register NewReg, MachineBasicBlock *Flow, in updateLiveRangeInElseRegion() argument
478 LiveVariables::VarInfo &NewVarInfo = LV->getVarInfo(NewReg); in updateLiveRangeInElseRegion()
512 Register NewReg = MRI->createVirtualRegister(RC); in optimizeLiveRange() local
515 TII->get(TargetOpcode::PHI), NewReg); in optimizeLiveRange()
531 O.setReg(NewReg); in optimizeLiveRange()
546 O.setReg(NewReg); in optimizeLiveRange()
553 updateLiveRangeInElseRegion(Reg, NewReg, Flow, Endif, ElseBlocks); in optimizeLiveRange()
564 Register NewReg = MRI->createVirtualRegister(RC); in optimizeWaterfallLiveRange() local
574 O.setReg(NewReg); in optimizeWaterfallLiveRange()
[all …]
H A DSIMachineFunctionInfo.cpp346 Register NewReg = in shiftWwmVGPRsToLowestRange() local
348 if (!NewReg || NewReg >= Reg) in shiftWwmVGPRsToLowestRange()
351 MRI.replaceRegWith(Reg, NewReg); in shiftWwmVGPRsToLowestRange()
354 WWMVGPRs[I] = NewReg; in shiftWwmVGPRsToLowestRange()
356 WWMReservedRegs.insert(NewReg); in shiftWwmVGPRsToLowestRange()
357 MRI.reserveReg(NewReg, TRI); in shiftWwmVGPRsToLowestRange()
364 SpillPhysVGPRs[Idx] = NewReg; in shiftWwmVGPRsToLowestRange()
376 Reg = NewReg; in shiftWwmVGPRsToLowestRange()
613 void SIMachineFunctionInfo::MRI_NoteCloneVirtualRegister(Register NewReg, in MRI_NoteCloneVirtualRegister() argument
615 VRegFlags.grow(NewReg); in MRI_NoteCloneVirtualRegister()
[all …]
H A DAMDGPUGlobalISelDivergenceLowering.cpp72 void replaceDstReg(Register NewReg, Register OldReg,
124 void DivergenceLoweringHelper::replaceDstReg(Register NewReg, Register OldReg, in replaceDstReg() argument
127 .addReg(NewReg); in replaceDstReg()
193 Register NewReg) { in replaceUsesOfRegInInstWith() argument
196 Op.setReg(NewReg); in replaceUsesOfRegInInstWith()
H A DSILowerI1Copies.cpp54 void replaceDstReg(Register NewReg, Register OldReg,
575 Register NewReg = SSAUpdater.GetValueInMiddleOfBlock(&MBB); in lowerPhis() local
576 if (NewReg != DstReg) { in lowerPhis()
577 replaceDstReg(NewReg, DstReg, &MBB); in lowerPhis()
779 void Vreg1LoweringHelper::replaceDstReg(Register NewReg, Register OldReg, in replaceDstReg() argument
781 MRI->replaceRegWith(NewReg, OldReg); in replaceDstReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMakeCompressible.cpp371 Register NewReg) { in updateOperands() argument
400 MO.setReg(NewReg); in updateOperands()
434 Register NewReg = analyzeCompressibleUses(MI, RegImm, MIs); in runOnMachineFunction() local
435 if (!NewReg) in runOnMachineFunction()
441 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(RISCV::ADDI), NewReg) in runOnMachineFunction()
446 TII.copyPhysReg(MBB, MI, MI.getDebugLoc(), NewReg, RegImm.Reg, in runOnMachineFunction()
456 updateOperands(*UpdateMI, RegImm, NewReg); in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVMCInstLower.cpp51 MCRegister NewReg = MAI->getRegisterAlias(MF, MO.getReg()); in lower() local
52 MCOp = MCOperand::createReg(NewReg.isValid() ? NewReg in lower()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp161 unsigned NewReg; in processMachineBasicBlock() local
166 NewReg = AArch64::WZR; in processMachineBasicBlock()
168 NewReg = AArch64::XZR; in processMachineBasicBlock()
174 MO.setReg(NewReg); in processMachineBasicBlock()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLocalizer.cpp136 Register NewReg = MRI->cloneVirtualRegister(Reg); in localizeInterBlock() local
137 LocalizedMI->getOperand(0).setReg(NewReg); in localizeInterBlock()
139 MBBWithLocalDef.try_emplace(MBBAndReg, NewReg).first; in localizeInterBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DA15SDOptimizer.cpp625 unsigned NewReg = optimizeSDPattern(MI); in runOnInstruction() local
627 if (NewReg != 0) { in runOnInstruction()
635 MRI->constrainRegClass(NewReg, MRI->getRegClass(Use->getReg())); in runOnInstruction()
638 << printReg(NewReg) << "\n"); in runOnInstruction()
639 Use->substVirtReg(NewReg, 0, *TRI); in runOnInstruction()
642 Replacements[MI] = NewReg; in runOnInstruction()

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