/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyPeephole.cpp | 60 /// If desirable, rewrite NewReg to a drop register. 61 static bool maybeRewriteToDrop(unsigned OldReg, unsigned NewReg, in maybeRewriteToDrop() argument 65 if (OldReg == NewReg) { in maybeRewriteToDrop() 67 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in maybeRewriteToDrop() local 68 MO.setReg(NewReg); in maybeRewriteToDrop() 70 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToDrop() 100 Register NewReg = MRI.createVirtualRegister(RegClass); in maybeRewriteToFallthrough() local 101 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(CopyLocalOpc), NewReg) in maybeRewriteToFallthrough() 103 MO.setReg(NewReg); in maybeRewriteToFallthrough() 104 MFI.stackifyVReg(MRI, NewReg); in maybeRewriteToFallthrough() 147 Register NewReg = Op2.getReg(); runOnMachineFunction() local [all...] |
H A D | WebAssemblyExplicitLocals.cpp | 316 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local 318 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc), NewReg) in runOnMachineFunction() 320 MI.getOperand(2).setReg(NewReg); in runOnMachineFunction() 321 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction() 345 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local 351 .addReg(NewReg); in runOnMachineFunction() 364 .addReg(NewReg); in runOnMachineFunction() 369 Def.setReg(NewReg); in runOnMachineFunction() 371 MFI.stackifyVReg(MRI, NewReg); in runOnMachineFunction() 417 Register NewReg = MRI.createVirtualRegister(RC); in runOnMachineFunction() local [all …]
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H A D | WebAssemblyDebugValueManager.cpp | 355 Register NewReg, in cloneSink() argument 371 if (NewReg != CurrentReg && NewReg.isValid()) in cloneSink() 372 Clone->getOperand(0).setReg(NewReg); in cloneSink() 387 if (NewReg != CurrentReg && NewReg.isValid()) in cloneSink() 390 MO.setReg(NewReg); in cloneSink()
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H A D | WebAssemblyRegStackify.cpp | 541 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in moveForSingleUse() local 542 Op.setReg(NewReg); in moveForSingleUse() 543 DefDIs.updateReg(NewReg); in moveForSingleUse() 546 LIS.createAndComputeVirtRegInterval(NewReg); in moveForSingleUse() 554 MFI.stackifyVReg(MRI, NewReg); in moveForSingleUse() 582 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); in rematerializeCheapDef() local 583 DefDIs.cloneSink(&*Insert, NewReg); in rematerializeCheapDef() 584 Op.setReg(NewReg); in rematerializeCheapDef() 588 LIS.createAndComputeVirtRegInterval(NewReg); in rematerializeCheapDef() 589 MFI.stackifyVReg(MRI, NewReg); in rematerializeCheapDef()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | CriticalAntiDepBreaker.cpp | 353 unsigned NewReg) { in isNewRegClobberedByRefs() argument 366 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs() 370 CheckOper.getReg() != NewReg) in isNewRegClobberedByRefs() 400 for (unsigned NewReg : Order) { in findSuitableFreeRegister() local 402 if (NewReg == AntiDepReg) continue; in findSuitableFreeRegister() 406 if (NewReg == LastNewReg) continue; in findSuitableFreeRegister() 410 if (isNewRegClobberedByRefs(RegRefBegin, RegRefEnd, NewReg)) continue; in findSuitableFreeRegister() 415 assert(((KillIndices[NewReg] == ~0u) != (DefIndices[NewReg] == ~0u)) in findSuitableFreeRegister() 417 if (KillIndices[NewReg] != ~0u || in findSuitableFreeRegister() 418 Classes[NewReg] == reinterpret_cast<TargetRegisterClass *>(-1) || in findSuitableFreeRegister() [all …]
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H A D | AggressiveAntiDepBreaker.cpp | 638 unsigned NewReg = 0; in FindSuitableFreeRegisters() local 640 NewReg = NewSuperReg; in FindSuitableFreeRegisters() 644 NewReg = TRI->getSubReg(NewSuperReg, NewSubRegIdx); in FindSuitableFreeRegisters() 647 LLVM_DEBUG(dbgs() << " " << printReg(NewReg, TRI)); in FindSuitableFreeRegisters() 650 if (!RenameRegisterMap[Reg].test(NewReg)) { in FindSuitableFreeRegisters() 659 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) { in FindSuitableFreeRegisters() 664 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) { in FindSuitableFreeRegisters() 682 int Idx = UseMI->findRegisterDefOperandIdx(NewReg, TRI, false, true); in FindSuitableFreeRegisters() 700 if (DefMI->readsRegister(NewReg, TRI)) { in FindSuitableFreeRegisters() 707 RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg)); in FindSuitableFreeRegisters() [all …]
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H A D | MachineCSE.cpp | 636 Register NewReg = CSMI->getOperand(i).getReg(); in ProcessBlockCSE() local 645 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlockCSE() 648 if (OldReg == NewReg) { in ProcessBlockCSE() 653 assert(OldReg.isVirtual() && NewReg.isVirtual() && in ProcessBlockCSE() 656 if (!isProfitableToCSE(NewReg, OldReg, CSMI->getParent(), &MI)) { in ProcessBlockCSE() 665 if (!MRI->constrainRegAttrs(NewReg, OldReg)) { in ProcessBlockCSE() 672 CSEPairs.push_back(std::make_pair(OldReg, NewReg)); in ProcessBlockCSE() 680 unsigned NewReg = CSEPair.second; in ProcessBlockCSE() local 682 MachineInstr *Def = MRI->getUniqueVRegDef(NewReg); in ProcessBlockCSE() 684 Def->clearRegisterDeads(NewReg); in ProcessBlockCSE() [all …]
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H A D | ModuloSchedule.cpp | 409 unsigned NewReg = VRMap[PrevStage][LoopVal]; in generateExistingPhis() local 411 InitVal, NewReg); in generateExistingPhis() 424 unsigned NewReg = 0; in generateExistingPhis() local 524 NewReg = PhiOp2; in generateExistingPhis() 531 NewReg = VRMap[ReuseStage - np][LoopVal]; in generateExistingPhis() 534 Def, NewReg); in generateExistingPhis() 536 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis() 537 PhiOp2 = NewReg; in generateExistingPhis() 542 replaceRegUsesAfterLoop(Def, NewReg, BB, MRI, LIS); in generateExistingPhis() 553 NewReg = MRI.createVirtualRegister(RC); in generateExistingPhis() [all …]
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H A D | InitUndef.cpp | 182 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in handleSubReg() local 184 TII->get(TargetOpcode::INSERT_SUBREG), NewReg) in handleSubReg() 188 LatestReg = NewReg; in handleSubReg() 207 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in fixupIllOperand() local 208 BuildMI(*MI->getParent(), MI, MI->getDebugLoc(), TII->get(Opcode), NewReg); in fixupIllOperand() 209 MO.setReg(NewReg); in fixupIllOperand()
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H A D | TailDuplicator.cpp | 340 void TailDuplicator::addSSAUpdateEntry(Register OrigReg, Register NewReg, in addSSAUpdateEntry() argument 345 LI->second.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry() 348 Vals.push_back(std::make_pair(BB, NewReg)); in addSSAUpdateEntry() 413 Register NewReg = MRI->createVirtualRegister(RC); in duplicateInstruction() local 414 MO.setReg(NewReg); in duplicateInstruction() 415 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction() 417 addSSAUpdateEntry(Reg, NewReg, PredBB); in duplicateInstruction() 460 Register NewReg = MRI->createVirtualRegister(OrigRC); in duplicateInstruction() local 462 TII->get(TargetOpcode::COPY), NewReg) in duplicateInstruction() 465 LocalVRMap.insert(std::make_pair(Reg, RegSubRegPair(NewReg, 0))); in duplicateInstruction() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYRegisterInfo.cpp | 199 Register NewReg = STI.hasE2() in eliminateFrameIndex() local 203 auto *Temp = BuildMI(MBB, II, DL, TII->get(CSKY::LD32W), NewReg) in eliminateFrameIndex() 210 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex() 219 Register NewReg; in eliminateFrameIndex() local 221 NewReg = MRI.createVirtualRegister(&CSKY::GPRRegClass); in eliminateFrameIndex() 222 BuildMI(MBB, II, DL, TII->get(CSKY::MVC32), NewReg) in eliminateFrameIndex() 225 NewReg = MRI.createVirtualRegister(&CSKY::mGPRRegClass); in eliminateFrameIndex() 226 BuildMI(MBB, II, DL, TII->get(CSKY::MOVI16), NewReg).addImm(0); in eliminateFrameIndex() 228 .addReg(NewReg, RegState::Define) in eliminateFrameIndex() 230 .addReg(NewReg, getKillRegState(true)) in eliminateFrameIndex() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | AntiDepBreaker.h | 58 /// other machine instruction to use NewReg. 59 void UpdateDbgValue(MachineInstr &MI, unsigned OldReg, unsigned NewReg) { 63 MI.getDebugOperand(0).setReg(NewReg); in UpdateDbgValue() 67 MI.getOperand(0).setReg(NewReg); in UpdateDbgValue() 74 /// breaker's update of ParentMI to use NewReg. 76 unsigned OldReg, unsigned NewReg) { in UpdateDbgValues() 84 UpdateDbgValue(*DbgMI, OldReg, NewReg); in UpdateDbgValues() 60 UpdateDbgValue(MachineInstr & MI,unsigned OldReg,unsigned NewReg) UpdateDbgValue() argument 77 UpdateDbgValues(const DbgValueVector & DbgValues,MachineInstr * ParentMI,unsigned OldReg,unsigned NewReg) UpdateDbgValues() argument
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H A D | MachineRegisterInfo.h | 60 virtual void MRI_NoteCloneVirtualRegister(Register NewReg, in MRI_NoteCloneVirtualRegister() argument 62 MRI_NoteNewVirtualRegister(NewReg); in MRI_NoteCloneVirtualRegister() 182 void noteCloneVirtualRegister(Register NewReg, Register SrcReg) { in noteCloneVirtualRegister() argument 184 TheDelegate->MRI_NoteCloneVirtualRegister(NewReg, SrcReg); in noteCloneVirtualRegister() 861 void updateDbgUsersToReg(MCRegister OldReg, MCRegister NewReg, in updateDbgUsersToReg() argument 865 auto UpdateOp = [this, &NewReg, &OldReg](MachineOperand &Op) { in updateDbgUsersToReg() 868 Op.setReg(NewReg); in updateDbgUsersToReg() 877 assert(MI->hasDebugOperandForReg(NewReg) && in updateDbgUsersToReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIOptimizeVGPRLiveRange.cpp | 127 Register Reg, Register NewReg, MachineBasicBlock *Flow, 470 Register Reg, Register NewReg, MachineBasicBlock *Flow, in updateLiveRangeInElseRegion() argument 473 LiveVariables::VarInfo &NewVarInfo = LV->getVarInfo(NewReg); in updateLiveRangeInElseRegion() 507 Register NewReg = MRI->createVirtualRegister(RC); in optimizeLiveRange() local 510 TII->get(TargetOpcode::PHI), NewReg); in optimizeLiveRange() 526 O.setReg(NewReg); in optimizeLiveRange() 541 O.setReg(NewReg); in optimizeLiveRange() 548 updateLiveRangeInElseRegion(Reg, NewReg, Flow, Endif, ElseBlocks); in optimizeLiveRange() 559 Register NewReg = MRI->createVirtualRegister(RC); in optimizeWaterfallLiveRange() local 569 O.setReg(NewReg); in optimizeWaterfallLiveRange() [all …]
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H A D | GCNRewritePartialRegUses.cpp | 122 void updateLiveIntervals(Register OldReg, Register NewReg, 349 Register NewReg, in updateLiveIntervals() argument 355 auto &NewLI = LIS->createEmptyInterval(NewReg); in updateLiveIntervals() 385 LIS->removeInterval(NewReg); in updateLiveIntervals() 386 LIS->createAndComputeVirtRegInterval(NewReg); in updateLiveIntervals() 457 Register NewReg = MRI->createVirtualRegister(NewRC); in rewriteReg() local 460 << printReg(NewReg, TRI) << ':' in rewriteReg() 464 MO.setReg(NewReg); in rewriteReg() 476 updateLiveIntervals(Reg, NewReg, SubRegs); in rewriteReg()
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H A D | SIMachineFunctionInfo.cpp | 328 Register NewReg = in shiftSpillPhysVGPRsToLowestRange() local 330 if (!NewReg || NewReg >= Reg) in shiftSpillPhysVGPRsToLowestRange() 333 MRI.replaceRegWith(Reg, NewReg); in shiftSpillPhysVGPRsToLowestRange() 337 WWMReservedRegs.insert(NewReg); in shiftSpillPhysVGPRsToLowestRange() 338 WWMSpills.insert(std::make_pair(NewReg, WWMSpills[Reg])); in shiftSpillPhysVGPRsToLowestRange() 346 Reg = NewReg; in shiftSpillPhysVGPRsToLowestRange() 581 void SIMachineFunctionInfo::MRI_NoteCloneVirtualRegister(Register NewReg, in MRI_NoteCloneVirtualRegister() argument 583 VRegFlags.grow(NewReg); in MRI_NoteCloneVirtualRegister() 584 VRegFlags[NewReg] = VRegFlags[SrcReg]; in MRI_NoteCloneVirtualRegister()
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H A D | AMDGPUGlobalISelDivergenceLowering.cpp | 74 void replaceDstReg(Register NewReg, Register OldReg, 123 void DivergenceLoweringHelper::replaceDstReg(Register NewReg, Register OldReg, in replaceDstReg() argument 126 .addReg(NewReg); in replaceDstReg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVMakeCompressible.cpp | 340 Register NewReg) { in updateOperands() argument 369 MO.setReg(NewReg); in updateOperands() 403 Register NewReg = analyzeCompressibleUses(MI, RegImm, MIs); in runOnMachineFunction() local 404 if (!NewReg) in runOnMachineFunction() 410 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(RISCV::ADDI), NewReg) in runOnMachineFunction() 422 BuildMI(MBB, MI, MI.getDebugLoc(), TII.get(Opcode), NewReg) in runOnMachineFunction() 433 updateOperands(*UpdateMI, RegImm, NewReg); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
H A D | SPIRVMCInstLower.cpp | 51 Register NewReg = MAI->getRegisterAlias(MF, MO.getReg()); in lower() local 52 MCOp = MCOperand::createReg(NewReg.isValid() ? NewReg : MO.getReg()); in lower()
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H A D | SPIRVModuleAnalysis.h | 197 Register NewReg = Register::index2VirtReg(getNextID()); in getOrCreateMBBRegister() local 198 BBNumToRegMap[MBB.getNumber()] = NewReg; in getOrCreateMBBRegister() 199 return NewReg; in getOrCreateMBBRegister()
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H A D | SPIRVPreLegalizer.cpp | 380 Register NewReg = MRI.createGenericVirtualRegister(MRI.getType(Reg)); in insertAssignInstr() local 382 MRI.setRegClass(NewReg, RC); in insertAssignInstr() 384 MRI.setRegClass(NewReg, &SPIRV::IDRegClass); in insertAssignInstr() 390 GR->assignSPIRVTypeToVReg(SpirvTy, NewReg, MIB.getMF()); in insertAssignInstr() 396 .addUse(NewReg) in insertAssignInstr() 399 Def->getOperand(0).setReg(NewReg); in insertAssignInstr() 400 return NewReg; in insertAssignInstr() 408 auto NewReg = in processInstr() local 410 AssignTypeInst.getOperand(1).setReg(NewReg); in processInstr() 411 MI.getOperand(0).setReg(NewReg); in processInstr()
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H A D | SPIRVISelLowering.cpp | 118 Register NewReg = MRI->createGenericVirtualRegister(LLT::scalar(32)); in doInsertBitcast() local 121 .addDef(NewReg) in doInsertBitcast() 128 MRI->setRegClass(NewReg, &SPIRV::IDRegClass); in doInsertBitcast() 129 GR.assignSPIRVTypeToVReg(NewPtrType, NewReg, MIB.getMF()); in doInsertBitcast() 130 I.getOperand(OpIdx).setReg(NewReg); in doInsertBitcast()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64DeadRegisterDefinitionsPass.cpp | 165 unsigned NewReg; in processMachineBasicBlock() local 170 NewReg = AArch64::WZR; in processMachineBasicBlock() 172 NewReg = AArch64::XZR; in processMachineBasicBlock() 178 MO.setReg(NewReg); in processMachineBasicBlock()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | Localizer.cpp | 136 Register NewReg = MRI->cloneVirtualRegister(Reg); in localizeInterBlock() 137 LocalizedMI->getOperand(0).setReg(NewReg); in localizeInterBlock() 139 MBBWithLocalDef.insert(std::make_pair(MBBAndReg, NewReg)).first; in localizeInterBlock() 134 Register NewReg = MRI->cloneVirtualRegister(Reg); localizeInterBlock() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 625 unsigned NewReg = optimizeSDPattern(MI); in runOnInstruction() local 627 if (NewReg != 0) { in runOnInstruction() 635 MRI->constrainRegClass(NewReg, MRI->getRegClass(Use->getReg())); in runOnInstruction() 638 << printReg(NewReg) << "\n"); in runOnInstruction() 639 Use->substVirtReg(NewReg, 0, *TRI); in runOnInstruction() 642 Replacements[MI] = NewReg; in runOnInstruction()
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