| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | InitUndef.cpp | 229 Register NewDest = MRI->createVirtualRegister(RC); in processBasicBlock() local
232 NewRegs.insert(NewDest); in processBasicBlock()
234 NewDest); in processBasicBlock()
235 UseMO.setReg(NewDest); in processBasicBlock()
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| H A D | BranchFolding.h | 144 MachineBasicBlock &NewDest);
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| H A D | TargetInstrInfo.cpp | 143 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
163 if (++MachineFunction::iterator(MBB) != MachineFunction::iterator(NewDest)) in ReplaceTailWithBranchTo()
164 insertBranch(*MBB, NewDest, nullptr, SmallVector<MachineOperand, 0>(), DL); in ReplaceTailWithBranchTo()
165 MBB->addSuccessor(NewDest); in ReplaceTailWithBranchTo()
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| H A D | BranchFolding.cpp | 363 MachineBasicBlock &NewDest) { in replaceTailWithBranchTo() argument
379 for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) { in replaceTailWithBranchTo()
392 TII->ReplaceTailWithBranchTo(OldInst, &NewDest); in replaceTailWithBranchTo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.h | 35 MachineBasicBlock *NewDest) const override;
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| H A D | Thumb2InstrInfo.cpp | 64 MachineBasicBlock *NewDest) const { in ReplaceTailWithBranchTo()
68 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
82 TargetInstrInfo::ReplaceTailWithBranchTo(Tail, NewDest); in ReplaceTailWithBranchTo()
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| H A D | ARMConstantIslandPass.cpp | 1782 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB(); in fixupConditionalBr() local
1783 if (BBUtils->isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1788 MI->getOperand(0).setMBB(NewDest); in fixupConditionalBr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYConstantIslandPass.cpp | 1310 MachineBasicBlock *NewDest = TII->getBranchDestBlock(*BMI); in fixupConditionalBr() local
1311 if (isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1316 MI->getOperand(MI->getNumExplicitOperands() - 1).setMBB(NewDest); in fixupConditionalBr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsConstantIslandPass.cpp | 1579 MachineBasicBlock *NewDest = in fixupConditionalBr() local
1581 if (isBBInRange(MI, NewDest, Br.MaxDisp)) { in fixupConditionalBr()
1587 MI->getOperand(TargetOperand).setMBB(NewDest); in fixupConditionalBr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 7664 Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in lowerScalarXnor() local
7668 BuildMI(MBB, MII, DL, get(AMDGPU::V_XNOR_B32_e64), NewDest) in lowerScalarXnor()
7672 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
7673 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
7685 Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in lowerScalarXnor() local
7692 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
7697 Xor = BuildMI(MBB, MII, DL, get(AMDGPU::S_XOR_B32), NewDest) in lowerScalarXnor()
7705 BuildMI(MBB, MII, DL, get(AMDGPU::S_NOT_B32), NewDest).addReg(Temp); in lowerScalarXnor()
7709 MRI.replaceRegWith(Dest.getReg(), NewDest); in lowerScalarXnor()
7713 addUsersToMoveToVALUWorklist(NewDest, MRI, Worklist); in lowerScalarXnor()
[all …]
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| H A D | SIRegisterInfo.cpp | 2471 Register NewDest = RS->scavengeRegisterBackwards( in eliminateFrameIndex() local
2474 NewDest) in eliminateFrameIndex()
2476 ResultReg = NewDest; in eliminateFrameIndex()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 840 MachineBasicBlock *NewDest) const;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Instructions.h | 4305 void setUnwindDest(BasicBlock *NewDest) {
4306 assert(NewDest);
4308 Op<1>() = NewDest;
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