/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | MatchContext.h | 120 SDValue N2) { in getNode() argument 124 return DAG.getNode(VPOpcode, DL, VT, {N1, N2, RootMaskOp, RootVectorLenOp}); in getNode() 128 SDValue N2, SDValue N3) { in getNode() argument 133 {N1, N2, N3, RootMaskOp, RootVectorLenOp}); in getNode() 146 SDValue N2, SDNodeFlags Flags) { in getNode() argument 150 return DAG.getNode(VPOpcode, DL, VT, {N1, N2, RootMaskOp, RootVectorLenOp}, in getNode() 155 SDValue N2, SDValue N3, SDNodeFlags Flags) { in getNode() argument 160 {N1, N2, N3, RootMaskOp, RootVectorLenOp}, Flags); in getNode()
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H A D | SelectionDAG.cpp | 2080 static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) { in commuteShuffle() argument 2081 std::swap(N1, N2); in commuteShuffle() 2086 SDValue N2, ArrayRef<int> Mask) { in getVectorShuffle() argument 2089 assert(VT == N1.getValueType() && VT == N2.getValueType() && in getVectorShuffle() 2093 if (N1.isUndef() && N2.isUndef()) in getVectorShuffle() 2107 if (N1 == N2) { in getVectorShuffle() 2108 N2 = getUNDEF(VT); in getVectorShuffle() 2115 commuteShuffle(N1, N2, MaskVec); in getVectorShuffle() 2143 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2)) in getVectorShuffle() 2150 bool N2Undef = N2.isUndef(); in getVectorShuffle() [all …]
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H A D | DAGCombiner.cpp | 590 SDValue SimplifySelect(const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2); 592 SDValue N2, SDValue N3, ISD::CondCode CC, 595 const SDLoc &DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, 599 SDValue N2, SDValue N3, ISD::CondCode CC); 1003 SDValue N0, N1, N2; in isOneUseSetCC() local 1004 if (isSetCCEquivalent(N, N0, N1, N2) && N->hasOneUse()) in isOneUseSetCC() 5514 static SDValue isSaturatingMinMax(SDValue N0, SDValue N1, SDValue N2, in isSaturatingMinMax() argument 5517 auto isSignedMinMax = [&](SDValue N0, SDValue N1, SDValue N2, SDValue N3, in isSaturatingMinMax() 5521 if (N0 != N2 && (N2.getOpcode() != ISD::TRUNCATE || N0 != N2.getOperand(0))) in isSaturatingMinMax() 5536 unsigned Opcode0 = isSignedMinMax(N0, N1, N2, N3, CC); in isSaturatingMinMax() [all …]
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/freebsd/crypto/openssl/crypto/bn/asm/ |
H A D | armv4-mont.pl | 302 my ($N0,$N1,$N2,$N3)=map("d$_",(4..7)); 363 vmlal.u32 @ACC[4],$Ni,${N2}[0] 365 vmlal.u32 @ACC[5],$Ni,${N2}[1] 411 vmlal.u32 @ACC[4],$Ni,${N2}[0] 413 vmlal.u32 @ACC[5],$Ni,${N2}[1] 506 vmlal.u32 @ACC[4],$Ni,${N2}[0] 508 vmlal.u32 @ACC[5],$Ni,${N2}[1] 542 vmlal.u32 @ACC[4],$Ni,${N2}[0] 544 vmlal.u32 @ACC[5],$Ni,${N2}[1] 581 vmlal.u32 @ACC[4],$Ni,${N2}[0] [all …]
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H A D | ppc64-mont.pl | 176 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 400 lfd $N2,`$FRAME+112`($sp) 408 fcfid $N2,$N2 427 stfd $N2,56($nap_d) ; save n[j+1] in double format 441 fmadd $T2a,$N2,$na,$T2a 442 fmadd $T2b,$N2,$nb,$T2b 452 fmadd $T3a,$N2,$nc,$T3a 453 fmadd $T3b,$N2,$nd,$T3b 538 lfd $N2,`$FRAME+112`($sp) 546 fcfid $N2,$N2 [all …]
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/freebsd/share/examples/netgraph/ |
H A D | virtual.chain | 231 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 233 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 235 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
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H A D | virtual.lan | 224 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 226 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 228 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
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/freebsd/sys/contrib/libsodium/test/default/ |
H A D | pwhash_scrypt_ll.c | 13 static const uint64_t N2 = 1024U; variable 55 tv(passwd2, salt2, N2, r2, p2); in main()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonCommonGEP.cpp | 86 bool operator()(const GepNode *N1, const GepNode *N2) const { in operator ()() 87 auto F1 = Map.find(N1), F2 = Map.find(N2); in operator ()() 479 static NodePair node_pair(GepNode *N1, GepNode *N2) { in node_pair() argument 481 uintptr_t P2 = reinterpret_cast<uintptr_t>(N2); in node_pair() 483 return std::make_pair(N1, N2); in node_pair() 484 return std::make_pair(N2, N1); in node_pair() 495 static bool node_eq(GepNode *N1, GepNode *N2, NodePairSet &Eq, in node_eq() argument 499 if (node_hash(N1) != node_hash(N2)) in node_eq() 502 NodePair NP = node_pair(N1, N2); in node_eq() 512 bool Different = (N1->Flags & CmpFlags) != (N2->Flags & CmpFlags); in node_eq() [all …]
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/freebsd/contrib/llvm-project/clang/include/clang/Tooling/ASTDiff/ |
H A D | ASTDiff.h | 105 bool isMatchingAllowed(const Node &N1, const Node &N2) const { in isMatchingAllowed() 106 return N1.getType().isSame(N2.getType()); in isMatchingAllowed()
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-g12b-odroid-n2.dts | 14 model = "Hardkernel ODROID-N2";
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H A D | meson-g12b-odroid-n2.dtsi | 60 model = "ODROID-N2";
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1539 SDValue N2 = N->getOperand(2); in PerformDAGCombine() local 1546 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); in PerformDAGCombine() 1551 SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2, in PerformDAGCombine() 1562 KnownBits Known = DAG.computeKnownBits(N2); in PerformDAGCombine() 1565 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); in PerformDAGCombine() 1575 SDValue N2 = N->getOperand(2); in PerformDAGCombine() local 1584 KnownBits Known = DAG.computeKnownBits(N2); in PerformDAGCombine() 1586 SDValue Borrow = N2; in PerformDAGCombine() 1588 DAG.getConstant(0, dl, VT), N2); in PerformDAGCombine() 1599 KnownBits Known = DAG.computeKnownBits(N2); in PerformDAGCombine() [all …]
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/freebsd/tools/test/stress2/misc/ |
H A D | snap5.sh | 49 r=`head -c4 /dev/random | od -N2 -tu4 | sed -ne '1s/ *$//;1s/.* //p'`
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 115 bool tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, 358 bool MSP430DAGToDAGISel::tryIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, in tryIndexedBinOp() argument 370 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; in tryIndexedBinOp()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 833 SDValue getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1, SDValue N2, 1150 SDValue N2); 1152 SDValue N2, SDValue N3); 1159 SDValue N2, const SDNodeFlags Flags); 1161 SDValue N2, SDValue N3, const SDNodeFlags Flags); 1163 SDValue N2, SDValue N3, SDValue N4); 1165 SDValue N2, SDValue N3, SDValue N4, SDValue N5); 1172 SDValue N2); 1174 SDValue N2, SDValue N3); 1176 SDValue N2, SDValue N3, SDValue N4); [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86OptimizeLEAs.cpp | 277 const MachineInstr &MI2, unsigned N2) const; 400 unsigned N2) const { in getAddrDispShift() 402 const MachineOperand &Op2 = MI2.getOperand(N2 + X86::AddrDisp); in getAddrDispShift()
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/freebsd/contrib/pam_modules/pam_passwdqc/ |
H A D | README | 21 min=N0,N1,N2,N3,N4 [min=disabled,24,12,8,7] 37 N2 is used for passphrases. A passphrase must consist of sufficient
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 1877 SDValue N2; in tryStoreVector() local 1885 N2 = N->getOperand(3); in tryStoreVector() 1893 N2 = N->getOperand(5); in tryStoreVector() 1915 if (SelectDirectAddr(N2, Addr)) { in tryStoreVector() 1933 } else if (PointerSize == 64 ? SelectADDRsi64(N2.getNode(), N2, Base, Offset) in tryStoreVector() 1934 : SelectADDRsi(N2.getNode(), N2, Base, Offset)) { in tryStoreVector() 1953 } else if (PointerSize == 64 ? SelectADDRri64(N2.getNode(), N2, Base, Offset) in tryStoreVector() 1954 : SelectADDRri(N2.getNode(), N2, Base, Offset)) { in tryStoreVector() 2031 StOps.push_back(N2); in tryStoreVector()
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/freebsd/contrib/llvm-project/clang/lib/AST/ |
H A D | ASTStructuralEquivalence.cpp | 582 const TemplateName &N2) { in IsStructurallyEquivalent() argument 584 TemplateDecl *TemplateDeclN2 = N2.getAsTemplateDecl(); in IsStructurallyEquivalent() 589 if (N1.getKind() != N2.getKind()) in IsStructurallyEquivalent() 593 else if (N1.getKind() != N2.getKind()) in IsStructurallyEquivalent() 601 *OS2 = N2.getAsOverloadedTemplate(); in IsStructurallyEquivalent() 618 *DN2 = N2.getAsDependentTemplateName(); in IsStructurallyEquivalent() 633 *P2 = N2.getAsSubstTemplateTemplateParmPack(); in IsStructurallyEquivalent()
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/freebsd/contrib/ntp/ntpd/ |
H A D | refclock_wwv.c | 439 #define N2 (N15 / 2) /* space (-1) */ macro 442 {N2, N2, 0, 0}, /* 0 */ 443 {P2, N2, 0, 0}, /* 1 */ 444 {N2, P2, 0, 0}, /* 2 */
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SchedOryon.td | 1496 "^SQ(ABS|NEG)v", "^SQ(XT|XTU)(N|N2)v", 1498 "^UQXT(N|N2)v", "^XTN2?v")>; 1500 def : InstRW<[ORYONWrite_3Cyc_FP0123], (instregex "^FCVT(L|L2|N|N2|XN|XN2)v", 1539 def : InstRW<[ORYONWrite_2Cyc_FP0123], (instregex "^RSHR(N|N2)v", "^SHLv", 1540 "^(SHL|SHR)(N|N2)v", 1542 "^(SQ|SQR)SHR(U)?(N|N2)v", 1543 "^(UQ|UQR)SHR(N|N2)v", 1656 def : InstRW<[ORYONWrite_3Cyc_FP0123], (instregex "^BFCVT(N|N2)?$")>;
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/freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 2123 const SCEV *N2 = collectUpperBound(Loop2, A1->getType()); in symbolicRDIVtest() local 2125 LLVM_DEBUG(if (N2) dbgs() << "\t N2 = " << *N2 << "\n"); in symbolicRDIVtest() 2142 if (N2) { in symbolicRDIVtest() 2144 const SCEV *A2N2 = SE->getMulExpr(A2, N2); in symbolicRDIVtest() 2154 if (N1 && N2) { in symbolicRDIVtest() 2157 const SCEV *A2N2 = SE->getMulExpr(A2, N2); in symbolicRDIVtest() 2175 if (N1 && N2) { in symbolicRDIVtest() 2178 const SCEV *A2N2 = SE->getMulExpr(A2, N2); in symbolicRDIVtest() 2203 if (N2) { in symbolicRDIVtest() 2205 const SCEV *A2N2 = SE->getMulExpr(A2, N2); in symbolicRDIVtest()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstructionSelector.h | 288 Register N0, N2, N3; member
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleA8.td | 820 // Result written in N2, but that is relative to the last cycle of multicycle, 854 // Result written in N2, but that is relative to the last cycle of multicycle, 860 // Result written in N2, but that is relative to the last cycle of multicycle,
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