Home
last modified time | relevance | path

Searched refs:Mid (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DParallel.h118 RandomAccessIterator Mid = Start + (std::distance(Start, End) / 2); in medianOf3() local
120 ? (Comp(*Mid, *(End - 1)) ? (Comp(*Start, *Mid) ? Mid : Start) in medianOf3()
122 : (Comp(*Mid, *Start) ? (Comp(*(End - 1), *Mid) ? Mid : End - 1) in medianOf3()
/freebsd/contrib/llvm-project/llvm/tools/bugpoint/
H A DListReducer.h119 unsigned Mid = MidTop / 2; in reduceList() local
120 std::vector<ElTy> Prefix(TheList.begin(), TheList.begin() + Mid); in reduceList()
121 std::vector<ElTy> Suffix(TheList.begin() + Mid, TheList.end()); in reduceList()
147 MidTop = Mid; in reduceList()
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dti,tas5086.txt24 If given, channel X will start with the Mid-Z start
29 power stages are compatible to Mid-Z - please refer
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLowerSwitch.cpp248 unsigned Mid = Size / 2; in SwitchConvert() local
249 std::vector<CaseRange> LHS(Begin, Begin + Mid); in SwitchConvert()
251 std::vector<CaseRange> RHS(Begin + Mid, End); in SwitchConvert()
254 CaseRange &Pivot = *(Begin + Mid); in SwitchConvert()
/freebsd/sys/contrib/dev/acpica/include/
H A Dacstruct.h302 } Mid; member
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRDFLiveness.cpp658 auto ClearIn = [](RegisterRef RR, const RegisterAggr &Mid, SubMap &SM) { in computePhiInfo() argument
659 if (Mid.empty()) in computePhiInfo()
664 RegisterRef S = Mid.clearIn(RR); in computePhiInfo()
H A DStackColoring.cpp1340 auto Mid = FirstS.begin() + OldSize; in run() local
1341 std::inplace_merge(FirstS.begin(), Mid, FirstS.end()); in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp1632 const auto &Mid = Mask.begin() + Mask.size() / 2; in lowerVECTOR_SHUFFLE_VPICKEV() local
1636 if (fitsRegularPattern<int>(Begin, 1, Mid, 0, 2)) in lowerVECTOR_SHUFFLE_VPICKEV()
1638 else if (fitsRegularPattern<int>(Begin, 1, Mid, Mask.size(), 2)) in lowerVECTOR_SHUFFLE_VPICKEV()
1643 if (fitsRegularPattern<int>(Mid, 1, End, 0, 2)) in lowerVECTOR_SHUFFLE_VPICKEV()
1645 else if (fitsRegularPattern<int>(Mid, 1, End, Mask.size(), 2)) in lowerVECTOR_SHUFFLE_VPICKEV()
1674 const auto &Mid = Mask.begin() + Mask.size() / 2; in lowerVECTOR_SHUFFLE_VPICKOD() local
1678 if (fitsRegularPattern<int>(Begin, 1, Mid, 1, 2)) in lowerVECTOR_SHUFFLE_VPICKOD()
1680 else if (fitsRegularPattern<int>(Begin, 1, Mid, Mask.size() + 1, 2)) in lowerVECTOR_SHUFFLE_VPICKOD()
1685 if (fitsRegularPattern<int>(Mid, 1, End, 1, 2)) in lowerVECTOR_SHUFFLE_VPICKOD()
1687 else if (fitsRegularPattern<int>(Mid, 1, End, Mask.size() + 1, 2)) in lowerVECTOR_SHUFFLE_VPICKOD()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp2901 const auto &Mid = Indices.begin() + Indices.size() / 2; in lowerVECTOR_SHUFFLE_PCKEV() local
2904 if (fitsRegularPattern<int>(Begin, 1, Mid, 0, 2)) in lowerVECTOR_SHUFFLE_PCKEV()
2906 else if (fitsRegularPattern<int>(Begin, 1, Mid, Indices.size(), 2)) in lowerVECTOR_SHUFFLE_PCKEV()
2911 if (fitsRegularPattern<int>(Mid, 1, End, 0, 2)) in lowerVECTOR_SHUFFLE_PCKEV()
2913 else if (fitsRegularPattern<int>(Mid, 1, End, Indices.size(), 2)) in lowerVECTOR_SHUFFLE_PCKEV()
2944 const auto &Mid = Indices.begin() + Indices.size() / 2; in lowerVECTOR_SHUFFLE_PCKOD() local
2947 if (fitsRegularPattern<int>(Begin, 1, Mid, 1, 2)) in lowerVECTOR_SHUFFLE_PCKOD()
2949 else if (fitsRegularPattern<int>(Begin, 1, Mid, Indices.size() + 1, 2)) in lowerVECTOR_SHUFFLE_PCKOD()
2954 if (fitsRegularPattern<int>(Mid, 1, End, 1, 2)) in lowerVECTOR_SHUFFLE_PCKOD()
2956 else if (fitsRegularPattern<int>(Mid, 1, End, Indices.size() + 1, 2)) in lowerVECTOR_SHUFFLE_PCKOD()
/freebsd/contrib/llvm-project/llvm/tools/llvm-profdata/
H A Dllvm-profdata.cpp1059 unsigned Mid = Contexts.size() / 2; in mergeInstrProfile() local
1061 assert(Mid > 0 && "Expected more than one context"); in mergeInstrProfile()
1063 for (unsigned I = 0; I < Mid; ++I) in mergeInstrProfile()
1065 Contexts[I + Mid].get()); in mergeInstrProfile()
1072 End = Mid; in mergeInstrProfile()
1073 Mid /= 2; in mergeInstrProfile()
1074 } while (Mid > 0); in mergeInstrProfile()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp980 Scatterer Mid = scatter(&BCI, V, MidVS); in visitBitCastInst() local
982 Res[ResI++] = Mid[J]; in visitBitCastInst()
/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-npcm730-kudo.dts521 // Mid-Fan
/freebsd/share/dict/
H A Dweb2a35285 Mid-african
35289 Mid-america
35290 Mid-american
35291 Mid-april
35294 Mid-asian
35295 Mid-atlantic
35296 Mid-august
35301 Mid-cambrian
35314 Mid-december
35352 Mid-empire
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp2792 auto [High, Mid, Low] = ((Opcode == ISD::FSHL) == (Amt < 32)) in expandFSH64()
2797 SDValue RHi = DAG.getNode(Opcode, DL, MVT::i32, {High, Mid, NewAmt}); in expandFSH64()
2798 SDValue RLo = DAG.getNode(Opcode, DL, MVT::i32, {Mid, Low, NewAmt}); in expandFSH64()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp11363 int Lo = Lane, Mid = Lane + NumHalfLaneElts, Hi = Lane + NumLaneElts; in lowerShuffleAsUNPCKAndPermute() local
11364 MatchLoAnyLane |= isUndefOrInRange(NormM, Lo, Mid); in lowerShuffleAsUNPCKAndPermute()
11365 MatchHiAnyLane |= isUndefOrInRange(NormM, Mid, Hi); in lowerShuffleAsUNPCKAndPermute()
52767 SDValue Mid = truncateVectorWithPACK(X86ISD::PACKUS, MVT::v16i16, USatVal, in combineTruncateWithSat() local
52769 assert(Mid && "Failed to pack!"); in combineTruncateWithSat()
52770 return DAG.getNode(X86ISD::VTRUNCUS, DL, VT, Mid); in combineTruncateWithSat()
52794 SDValue Mid = truncateVectorWithPACK(X86ISD::PACKSS, MidVT, USatVal, DL, in combineTruncateWithSat() local
52796 assert(Mid && "Failed to pack!"); in combineTruncateWithSat()
52797 SDValue V = truncateVectorWithPACK(X86ISD::PACKUS, VT, Mid, DL, DAG, in combineTruncateWithSat()
/freebsd/sys/contrib/dev/acpica/
H A Dchanges.txt13849 Fixed an interpreter problem with the Mid() operator in the case of an
14085 This was the Index argument to the Index, Mid, and Match operators.
14615 Fixed a problem with the Mid() ASL/AML operator where it did not work
18780 Support for the ACPI 2.0 "Mid" ASL operator has been implemented.
/freebsd/share/misc/
H A Dusb_vendors18515 022d Blade Stealth (Mid 2017)
18530 0245 Blade 15 (Mid 2019) Mercury
18531 0246 Blade 15 (Mid 2019) Base Model