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Searched refs:MemIndexedMode (Results 1 – 25 of 33) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1060 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
2400 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT,
2413 ISD::MemIndexedMode getAddressingMode() const {
2414 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2434 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT,
2462 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT,
2496 ISD::MemIndexedMode AM, EVT MemVT,
2550 ISD::MemIndexedMode getAddressingMode() const {
2551 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode);
2573 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding,
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H A DSelectionDAG.h1382 SDValue Offset, ISD::MemIndexedMode AM);
1383 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1390 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl,
1400 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1443 SDValue Offset, ISD::MemIndexedMode AM);
1445 SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1452 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1464 SDValue getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1486 SDValue Offset, ISD::MemIndexedMode AM);
1489 MachineMemOperand *MMO, ISD::MemIndexedMode AM,
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H A DISDOpcodes.h1523 enum MemIndexedMode { UNINDEXED = 0, PRE_INC, PRE_DEC, POST_INC, POST_DEC }; enum
H A DBasicTTIImpl.h193 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) { in getISDIndexedMode()
377 bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedLoadLegal()
383 bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, in isIndexedStoreLegal()
H A DTargetLowering.h3817 ISD::MemIndexedMode &/*AM*/, in getPreIndexedAddressParts() argument
3828 ISD::MemIndexedMode &/*AM*/, in getPostIndexedAddressParts() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.h110 ISD::MemIndexedMode &AM,
114 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DAVRISelDAGToDAG.cpp144 ISD::MemIndexedMode AM = LD->getAddressingMode(); in selectIndexedLoad()
H A DAVRISelLowering.cpp1073 ISD::MemIndexedMode &AM, in getPreIndexedAddressParts()
1130 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h184 ISD::MemIndexedMode &AM,
H A DMSP430ISelDAGToDAG.cpp309 ISD::MemIndexedMode AM = LD->getAddressingMode(); in isValidIndexedLoad()
H A DMSP430ISelLowering.cpp1336 ISD::MemIndexedMode &AM, in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h1627 enum MemIndexedMode { enum
1636 bool isIndexedLoadLegal(enum MemIndexedMode Mode, Type *Ty) const;
1639 bool isIndexedStoreLegal(enum MemIndexedMode Mode, Type *Ty) const;
2151 virtual bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2152 virtual bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const = 0;
2868 bool isIndexedLoadLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedLoadLegal()
2871 bool isIndexedStoreLegal(MemIndexedMode Mode, Type *Ty) const override { in isIndexedStoreLegal()
H A DTargetTransformInfoImpl.h880 bool isIndexedLoadLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedLoadLegal()
885 bool isIndexedStoreLegal(TTI::MemIndexedMode Mode, Type *Ty, in isIndexedStoreLegal()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h839 ISD::MemIndexedMode &AM, SelectionDAG &DAG) const;
841 ISD::MemIndexedMode &AM,
844 SDValue &Offset, ISD::MemIndexedMode &AM,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h502 ISD::MemIndexedMode &AM,
509 SDValue &Offset, ISD::MemIndexedMode &AM,
H A DARMISelDAGToDAG.cpp839 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetReg()
875 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImmPre()
895 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode2OffsetImm()
974 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectAddrMode3Offset()
1094 ISD::MemIndexedMode AM = LdSt->getAddressingMode(); in SelectAddrMode6Offset()
1401 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD) in SelectT2AddrModeImm8Offset()
1453 ISD::MemIndexedMode AM; in SelectT2AddrModeImm7Offset()
1597 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryARMIndexedLoad()
1677 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT1IndexedLoad()
1703 ISD::MemIndexedMode AM = LD->getAddressingMode(); in tryT2IndexedLoad()
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H A DARMInstrMVE.td7116 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7121 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7200 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
7215 ISD::MemIndexedMode AM = cast<MaskedStoreSDNode>(N)->getAddressingMode();
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1305 ISD::MemIndexedMode &AM,
1308 SDValue &Offset, ISD::MemIndexedMode &AM,
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp1236 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, in isIndexedLoadLegal()
1241 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, in isIndexedStoreLegal()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h295 ISD::MemIndexedMode &AM,
H A DHexagonISelDAGToDAG.cpp460 ISD::MemIndexedMode AM = LD->getAddressingMode(); in SelectLoad()
569 ISD::MemIndexedMode AM = ST->getAddressingMode(); in SelectStore()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8875 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
8899 SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, in getLoad()
8987 ISD::MemIndexedMode AM) { in getIndexedLoad()
9119 ISD::MemIndexedMode AM) { in getIndexedStore()
9147 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &dl, in getLoadVP()
9169 SDValue SelectionDAG::getLoadVP(ISD::MemIndexedMode AM, in getLoadVP()
9249 ISD::MemIndexedMode AM) { in getIndexedLoadVP()
9266 ISD::MemIndexedMode AM, bool IsTruncating, in getStoreVP()
9371 ISD::MemIndexedMode AM) { in getIndexedStoreVP()
9400 ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, const SDLoc &DL, in getStridedLoadVP()
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H A DSelectionDAGDumper.cpp564 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { in getIndexedModeName()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1340 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1351 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1392 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
1398 ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h846 ISD::MemIndexedMode &AM,

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