| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | MatchContext.h | 95 SDValue MaskOp = OpVal.getOperand(*MaskPos); in match() local
96 if (RootMaskOp != MaskOp && in match()
97 !ISD::isConstantSplatVectorAllOnes(MaskOp.getNode())) in match()
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| H A D | DAGCombiner.cpp | 7037 SDValue MaskOp = N->getOperand(1); in BackwardsPropagateMask() local
7045 SDValue(FixupNode, 0), MaskOp); in BackwardsPropagateMask()
7048 DAG.UpdateNodeOperands(And.getNode(), SDValue(FixupNode, 0), MaskOp); in BackwardsPropagateMask()
7064 DAG.getNode(ISD::AND, SDLoc(Op0), Op0.getValueType(), Op0, MaskOp); in BackwardsPropagateMask()
7068 DAG.getNode(ISD::AND, SDLoc(Op1), Op1.getValueType(), Op1, MaskOp); in BackwardsPropagateMask()
7080 SDValue(Load, 0), MaskOp); in BackwardsPropagateMask()
7084 DAG.UpdateNodeOperands(And.getNode(), SDValue(Load, 0), MaskOp), 0); in BackwardsPropagateMask()
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| H A D | SelectionDAGBuilder.cpp | 8636 SDValue MaskOp = getValue(VPIntrin.getOperand(3)); in visitVPCmp() local
8646 DAG.getSetCCVP(DL, DestVT, Op1, Op2, Condition, MaskOp, EVL)); in visitVPCmp()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | EarlyCSE.cpp | 1030 auto MaskOp = [](const IntrinsicInst *II) { in isNonTargetIntrinsicMatch() local
1056 if (MaskOp(Earlier) == MaskOp(Later) && ThruOp(Earlier) == ThruOp(Later)) in isNonTargetIntrinsicMatch()
1060 return IsSubmask(MaskOp(Later), MaskOp(Earlier)); in isNonTargetIntrinsicMatch()
1067 if (!IsSubmask(MaskOp(Later), MaskOp(Earlier))) in isNonTargetIntrinsicMatch()
1075 return IsSubmask(MaskOp(Later), MaskOp(Earlier)); in isNonTargetIntrinsicMatch()
1082 return IsSubmask(MaskOp(Earlier), MaskOp(Later)); in isNonTargetIntrinsicMatch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrPatternsVec.td | 123 class Mask_Binary<ValueType MaskVT, SDPatternOperator MaskOp, string InstName> :
124 Pat<(MaskVT (MaskOp MaskVT:$ma, MaskVT:$mb)), (!cast<Instruction>(InstName#"mm") $ma, $mb)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVVectorPeephole.cpp | 729 const MachineOperand &MaskOp = MI.getOperand(4); in foldVMergeToMask() local
730 MachineInstr *Mask = MRI->getUniqueVRegDef(MaskOp.getReg()); in foldVMergeToMask()
795 if (!ensureDominates(MaskOp, True)) in foldVMergeToMask()
804 MachineOperand::CreateReg(MaskOp.getReg(), false)); in foldVMergeToMask()
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| H A D | RISCVISelDAGToDAG.cpp | 4073 static bool usesAllOnesMask(SDValue MaskOp) { in usesAllOnesMask() argument
4084 return MaskOp->isMachineOpcode() && IsVMSet(MaskOp.getMachineOpcode()); in usesAllOnesMask()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetTransformInfo.cpp | 1121 Value *MaskOp = II->getArgOperand(1); in rewriteIntrinsicWithAddressSpace() local
1122 Type *MaskTy = MaskOp->getType(); in rewriteIntrinsicWithAddressSpace()
1137 KnownBits Known = computeKnownBits(MaskOp, DL, nullptr, II); in rewriteIntrinsicWithAddressSpace()
1147 MaskOp = B.CreateTrunc(MaskOp, MaskTy); in rewriteIntrinsicWithAddressSpace()
1151 {NewV, MaskOp}); in rewriteIntrinsicWithAddressSpace()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 821 MachineOperand &MaskOp = Instr.getOperand(0); in recomputeVPTBlockMask() local
822 assert(MaskOp.isImm() && "Operand 0 is not the block mask of the VPT/VPST?!"); in recomputeVPTBlockMask()
853 MaskOp.setImm((int64_t)(BlockMask)); in recomputeVPTBlockMask()
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| H A D | ARMISelLowering.cpp | 14629 SDValue MaskOp = N0.getOperand(1); in PerformORCombineToBFI() local
14630 ConstantSDNode *MaskC = dyn_cast<ConstantSDNode>(MaskOp); in PerformORCombineToBFI()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2811 auto SkipImpliedMask = [](SDValue MaskOp, uint64_t MaskBits) { in LowerShift() argument
2812 if (MaskOp.getOpcode() != ISD::AND) in LowerShift()
2813 return MaskOp; in LowerShift()
2814 SDValue LHS = MaskOp.getOperand(0); in LowerShift()
2815 SDValue RHS = MaskOp.getOperand(1); in LowerShift()
2816 if (MaskOp.getValueType().isVector()) { in LowerShift()
2823 MaskOp = LHS; in LowerShift()
2830 MaskOp = LHS; in LowerShift()
2833 return MaskOp; in LowerShift()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86InstComments.cpp | 290 unsigned MaskOp = Desc.getNumDefs(); in printMasking() local
292 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) in printMasking()
293 ++MaskOp; in printMasking()
295 const char *MaskRegName = getRegName(MI->getOperand(MaskOp).getReg()); in printMasking()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineVerifier.cpp | 1914 const MachineOperand &MaskOp = MI->getOperand(3); in verifyPreISelGenericInstruction() local
1915 if (!MaskOp.isShuffleMask()) { in verifyPreISelGenericInstruction()
1935 ArrayRef<int> MaskIdxes = MaskOp.getShuffleMask(); in verifyPreISelGenericInstruction()
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