| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelDAGToDAG.cpp | 210 case ISD::MULHS: in trySelect()
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| H A D | MipsSEISelLowering.cpp | 177 setOperationAction(ISD::MULHS, MVT::i32, Custom); in MipsSETargetLowering()
188 setOperationAction(ISD::MULHS, MVT::i64, Custom); in MipsSETargetLowering()
230 setOperationAction(ISD::MULHS, MVT::i32, Legal); in MipsSETargetLowering()
277 setOperationAction(ISD::MULHS, MVT::i64, Legal); in MipsSETargetLowering()
455 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 674 MULHS, enumerator
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| H A D | TargetLowering.h | 2890 case ISD::MULHS: in isCommutativeBinOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 225 setOperationAction(ISD::MULHS, T, Legal); in initializeHVXLowering()
300 setOperationAction(ISD::MULHS, T, Custom); in initializeHVXLowering()
335 setOperationAction(ISD::MULHS, WordV, Custom); // -> _LOHI in initializeHVXLowering()
1912 if (Opc == ISD::MULHS) in LowerHvxMulh()
1945 // Direct MULHS expansion is cheaper than doing the whole SMUL_LOHI, in LowerHvxMulLoHi()
3171 case ISD::MULHS: in LowerHvxOperation()
3221 case ISD::MULHS: in LowerHvxOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86IntrinsicsInfo.h | 405 X86_INTRINSIC_DATA(avx2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
944 X86_INTRINSIC_DATA(avx512_pmulh_w_512, INTR_TYPE_2OP, ISD::MULHS, 0),
1553 X86_INTRINSIC_DATA(sse2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 122 setOperationAction(ISD::MULHS, MVT::i8, Promote); in MSP430TargetLowering()
127 setOperationAction(ISD::MULHS, MVT::i16, Expand); in MSP430TargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 140 setOperationAction(ISD::MULHS, MVT::i32, Legal); in ARCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 260 case ISD::MULHS: return "mulhs"; in getOperationName()
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| H A D | TargetLowering.cpp | 3645 case ISD::MULHS: in SimplifyDemandedVectorElts()
6395 if (isOperationLegalOrCustom(ISD::MULHS, VT, IsAfterLegalization)) in BuildSDIV()
6396 return DAG.getNode(ISD::MULHS, dl, VT, X, Y); in BuildSDIV()
7552 isOperationLegalOrCustom(ISD::MULHS, HiLoVT); in expandMUL_LOHI()
7580 Hi = DAG.getNode(Signed ? ISD::MULHS : ISD::MULHU, dl, HiLoVT, L, R); in expandMUL_LOHI()
10694 unsigned HiOp = Signed ? ISD::MULHS : ISD::MULHU; in expandFixedPointMul()
10992 { ISD::MULHS, ISD::SMUL_LOHI, ISD::SIGN_EXTEND }}; in expandMULO()
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| H A D | LegalizeVectorOps.cpp | 346 case ISD::MULHS: in LegalizeOp()
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| H A D | LegalizeDAG.cpp | 3790 case ISD::MULHS: { in ExpandNode()
3807 Node->getOpcode() == ISD::UMUL_LOHI ? ISD::MULHU : ISD::MULHS; in ExpandNode()
3844 bool HasMULHS = TLI.isOperationLegalOrCustom(ISD::MULHS, VT); in ExpandNode()
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| H A D | LegalizeVectorTypes.cpp | 166 case ISD::MULHS: in ScalarizeVectorResult()
1234 case ISD::MULHS: in SplitVectorResult()
4369 case ISD::MULHS: in WidenVectorResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 107 setOperationAction(ISD::MULHS, VT, Expand); in BPFTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 485 setOperationAction({ISD::MULHU, ISD::MULHS}, MVT::i16, Expand); in AMDGPUTargetLowering()
487 setOperationAction({ISD::MUL, ISD::MULHU, ISD::MULHS}, MVT::i64, Expand); in AMDGPUTargetLowering()
511 ISD::MULHS, ISD::OR, ISD::SHL, in AMDGPUTargetLowering()
617 ISD::MULHU, ISD::MULHS, in AMDGPUTargetLowering()
5147 case ISD::MULHS: in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 115 setOperationAction(ISD::MULHS, MVT::i32, Expand); in LanaiTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 75 setOperationAction(ISD::MULHS, MVT::i32, Expand); in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 1728 case ISD::MULHS: in getArithmeticInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1833 setOperationAction(ISD::MULHS, MVT::i32, Expand); in SparcTargetLowering()
1856 setOperationAction(ISD::MULHS, MVT::i64, Expand); in SparcTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 98 setOperationAction(ISD::MULHS, MVT::i32, Expand); in XCoreTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 640 setOperationAction(ISD::MULHS, MVT::i32, Expand); in AArch64TargetLowering()
1327 setOperationAction(ISD::MULHS, VT, Legal); in AArch64TargetLowering()
1330 setOperationAction(ISD::MULHS, VT, Expand); in AArch64TargetLowering()
1443 setOperationAction(ISD::MULHS, VT, Custom); in AArch64TargetLowering()
1714 setOperationAction(ISD::MULHS, MVT::v1i64, Custom); in AArch64TargetLowering()
1715 setOperationAction(ISD::MULHS, MVT::v2i64, Custom); in AArch64TargetLowering()
1739 setOperationAction(ISD::MULHS, VT, Custom); in AArch64TargetLowering()
2083 setOperationAction(ISD::MULHS, VT, Default); in addTypeForFixedLengthSVE()
4034 SDValue UpperBits = DAG.getNode(ISD::MULHS, DL, MVT::i64, LHS, RHS); in getAArch64XALUOOp()
6926 case ISD::MULHS: in LowerOperation()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 184 setOperationAction(ISD::MULHS, VT, Expand); in AVRTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 156 {ISD::BSWAP, ISD::SMUL_LOHI, ISD::UMUL_LOHI, ISD::MULHS, ISD::MULHU, in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 266 setOperationAction({ISD::MULHS, ISD::MULHU}, VT, Legal); in LoongArchTargetLowering()
313 setOperationAction({ISD::MULHS, ISD::MULHU}, VT, Legal); in LoongArchTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 528 ISD::MUL, ISD::MULHS, ISD::MULHU, ISD::PARITY, in NVPTXTargetLowering()
698 setOperationAction({ISD::SDIV, ISD::UDIV, ISD::SRA, ISD::SRL, ISD::MULHS, in NVPTXTargetLowering()
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