| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsExpandPseudo.cpp | 310 unsigned LL, SC, SLT, SLTu, OR, MOVN, MOVZ, SELNEZ, SELEQZ; in expandAtomicBinOpSubword() local
322 MOVZ = Mips::MOVZ_I_MM; in expandAtomicBinOpSubword()
334 MOVZ = Mips::MOVZ_I_I; in expandAtomicBinOpSubword()
497 unsigned MOVIncr = IsMax ? MOVN : MOVZ; in expandAtomicBinOpSubword()
717 unsigned LL, SC, ZERO, BEQ, SLT, SLTu, OR, MOVN, MOVZ, SELNEZ, SELEQZ; in expandAtomicBinOp() local
728 MOVZ = Mips::MOVZ_I_MM; in expandAtomicBinOp()
743 MOVZ = Mips::MOVZ_I_I; in expandAtomicBinOp()
758 MOVZ = Mips::MOVZ_I64_I64; in expandAtomicBinOp()
898 unsigned MOVIncr = IsMax ? MOVN : MOVZ; in expandAtomicBinOp()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Schedule.td | 20 def WriteImm : SchedWrite; // MOVN, MOVZ
|
| H A D | AArch64SchedCyclone.td | 113 // MOVZ Rd, #0
133 // MOVN,MOVZ,MOVK
|
| H A D | AArch64SchedA55.td | 66 def : WriteRes<WriteImm, [CortexA55UnitALU]> { let Latency = 3; } // MOVN, MOVZ
|
| H A D | AArch64SchedAmpere1.td | 586 def : WriteRes<WriteImm, [Ampere1UnitAB]>; // MOVN, MOVZ
|
| H A D | AArch64SchedAmpere1B.td | 542 def : WriteRes<WriteImm, [Ampere1BUnitAB]>; // MOVN, MOVZ
|
| H A D | AArch64SchedFalkorDetails.td | 1235 def : InstRW<[FalkorWr_MOVZ], (instregex "^MOVZ(W|X)i$")>;
|
| H A D | AArch64SchedOryon.td | 778 "^MOVZ(W|X)i", "^SBFM(W|X)ri",
|
| H A D | AArch64SchedA510.td | 68 def : WriteRes<WriteImm, [CortexA510UnitALU]> { let Latency = 1; } // MOVN, MOVZ
|
| H A D | AArch64SchedA320.td | 57 def : WriteRes<WriteImm, [CortexA320UnitALU]> { let Latency = 1; } // MOVN, MOVZ
|
| H A D | AArch64InstrInfo.td | 2457 defm MOVZ : MoveImmediate<0b10, "movz">;
2510 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 0>;
2511 defm : movw_mov_alias<"MOVZ", MOVZWi, GPR32, 32, 16>;
2513 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 0>;
2514 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 16>;
2515 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 32>;
2516 defm : movw_mov_alias<"MOVZ", MOVZXi, GPR64, 64, 48>;
2587 // Deal with the various forms of (ELF) large addressing with MOVZ/MOVK
|
| H A D | AArch64SchedNeoverseV2.td | 1123 def : InstRW<[V2Write_0or1c_1I], (instregex "^MOVZ[WX]i$")>;
|
| /freebsd/sys/cddl/dev/dtrace/x86/ |
| H A D | dis_tables.c | 163 MOVZ, /* for movs and movz, with different size operands */ enumerator
2384 /* [B4] */ TS("lfs",MR), TS("lgs",MR), TS("movzb",MOVZ), TNS("movzwl",MOVZ),
2386 /* [BC] */ TS("bsf",MRw), TS("bsr",MRw), TS("movsb",MOVZ), TNS("movswl",MOVZ),
4666 case MOVZ: in dtrace_disx86()
|