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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCInstrInfo.h47 PacketIterator, std::forward_iterator_tag, const MCInst> {
49 MCInst::const_iterator BundleCurrent;
50 MCInst::const_iterator BundleEnd;
51 MCInst::const_iterator DuplexCurrent;
52 MCInst::const_iterator DuplexEnd;
55 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
56 PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
59 MCInst const &operator*() const;
86 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context);
87 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
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H A DHexagonMCInstrInfo.cpp1 //===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
23 #include "llvm/MC/MCInst.h"
40 MCInst const &Inst) in PacketIterator()
46 MCInst const &Inst, std::nullptr_t) in PacketIterator()
62 MCInst const &Inst = *BundleCurrent->getInst(); in operator ++()
71 MCInst const &Hexagon::PacketIterator::operator*() const { in operator *()
82 void HexagonMCInstrInfo::addConstant(MCInst &MI, uint64_t Value, in addConstant()
88 MCInstrInfo const &MCII, MCInst &MCB, in addConstExtender()
89 MCInst const &MCI) { in addConstExtender()
95 MCInst *XMC in addConstExtender()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMInstPrinter.h28 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
33 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
34 void printInstruction(const MCInst *MI, uint64_t Address,
36 virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
38 virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
45 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
47 void printOperand(const MCInst *MI, uint64_t Address, unsigned OpNum,
50 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
52 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,
55 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,
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H A DARMMCCodeEmitter.cpp25 #include "llvm/MC/MCInst.h"
81 uint64_t getBinaryCodeForInstr(const MCInst &MI,
87 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
95 uint32_t getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
99 bool EncodeAddrModeOpValues(const MCInst &MI, unsigned OpIdx,
106 uint32_t getThumbBLTargetOpValue(const MCInst &MI, unsigned OpIdx,
112 uint32_t getThumbBLXTargetOpValue(const MCInst &MI, unsigned OpIdx,
117 uint32_t getThumbBRTargetOpValue(const MCInst &MI, unsigned OpIdx,
122 uint32_t getThumbBCCTargetOpValue(const MCInst &MI, unsigned OpIdx,
127 uint32_t getThumbCBTargetOpValue(const MCInst
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.h27 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
28 void printInstruction(const MCInst *MI, uint64_t Address,
33 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
39 void printU4ImmOperand(const MCInst *MI, unsigned OpNo,
41 void printU16ImmOperand(const MCInst *MI, unsigned OpNo,
43 void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
44 void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
45 void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
46 void printU32ImmOperand(const MCInst *MI, unsigned OpNo,
48 void printNamedBit(const MCInst *MI, unsigned OpNo, raw_ostream &O,
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H A DR600InstPrinter.h22 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
24 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
25 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
28 void printAbs(const MCInst *MI, unsigned OpNo, raw_ostream &O);
29 void printBankSwizzle(const MCInst *MI, unsigned OpNo, raw_ostream &O);
30 void printClamp(const MCInst *MI, unsigned OpNo, raw_ostream &O);
31 void printCT(const MCInst *MI, unsigned OpNo, raw_ostream &O);
32 void printKCache(const MCInst *MI, unsigned OpNo, raw_ostream &O);
33 void printLast(const MCInst *MI, unsigned OpNo, raw_ostream &O);
34 void printLiteral(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS/
H A DEmulateInstructionMIPS.h20 class MCInst; variable
93 bool (EmulateInstructionMIPS::*callback)(llvm::MCInst &insn);
102 bool Emulate_ADDiu(llvm::MCInst &insn);
104 bool Emulate_SUBU_ADDU(llvm::MCInst &insn);
106 bool Emulate_LUI(llvm::MCInst &insn);
108 bool Emulate_SW(llvm::MCInst &insn);
110 bool Emulate_LW(llvm::MCInst &insn);
112 bool Emulate_ADDIUSP(llvm::MCInst &insn);
114 bool Emulate_ADDIUS5(llvm::MCInst &insn);
116 bool Emulate_SWSP(llvm::MCInst &insn);
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.h1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
9 // This class prints an AArch64 MCInst to a .s file.
30 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
36 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
37 virtual void printInstruction(const MCInst *MI, uint64_t Address,
39 virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
41 virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
52 bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
54 bool printSyspAlias(const MCInst *MI, const MCSubtargetInfo &STI,
56 bool printRangePrefetchAlias(const MCInst *M
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H A DAArch64MCCodeEmitter.cpp23 #include "llvm/MC/MCInst.h"
55 uint64_t getBinaryCodeForInstr(const MCInst &MI,
61 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
69 uint32_t getLdStUImm12OpValue(const MCInst &MI, unsigned OpIdx,
75 uint32_t getAdrLabelOpValue(const MCInst &MI, unsigned OpIdx,
81 uint32_t getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
87 uint32_t getCondBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
93 uint32_t getPAuthPCRelOpValue(const MCInst &MI, unsigned OpIdx,
99 uint32_t getLoadLiteralOpValue(const MCInst &MI, unsigned OpIdx,
106 uint32_t getMemExtendOpValue(const MCInst
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/MIPS64/
H A DEmulateInstructionMIPS64.h24 class MCInst; variable
85 bool (EmulateInstructionMIPS64::*callback)(llvm::MCInst &insn);
91 bool Emulate_DADDiu(llvm::MCInst &insn);
93 bool Emulate_DSUBU_DADDU(llvm::MCInst &insn);
95 bool Emulate_LUI(llvm::MCInst &insn);
97 bool Emulate_SD(llvm::MCInst &insn);
99 bool Emulate_LD(llvm::MCInst &insn);
101 bool Emulate_LDST_Imm(llvm::MCInst &insn);
103 bool Emulate_LDST_Reg(llvm::MCInst &insn);
105 bool Emulate_BXX_3ops(llvm::MCInst &insn);
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.h24 class MCInst; variable
47 void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
53 uint64_t getBinaryCodeForInstr(const MCInst &MI,
60 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
67 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
73 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
77 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
81 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
87 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
94 unsigned getBranchTargetOpValue(const MCInst
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H A DMipsInstPrinter.h82 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
83 void printInstruction(const MCInst *MI, uint64_t Address,
88 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
91 bool printAliasInstr(const MCInst *MI, uint64_t Address,
93 void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
98 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
100 void printJumpOperand(const MCInst *MI, unsigned OpNo,
102 void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo,
105 void printUImm(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
107 void printMemOperand(const MCInst *MI, int opNum, const MCSubtargetInfo &STI,
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/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kInstPrinter.h25 public M68kMemOperandPrinter<M68kInstPrinter, MCInst> {
34 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
38 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
41 bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
42 void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
45 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
48 void printOperand(const MCInst *MI, unsigned opNum, raw_ostream &O);
49 void printImmediate(const MCInst *MI, unsigned opNum, raw_ostream &O);
51 void printMoveMask(const MCInst *MI, unsigned opNum, raw_ostream &O);
53 void printMoveMaskR(const MCInst *MI, unsigned opNum, raw_ostream &O);
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCInstPrinter.h35 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
39 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
40 void printInstruction(const MCInst *MI, uint64_t Address,
44 bool printAliasInstr(const MCInst *MI, uint64_t Address,
46 void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
50 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
52 void printPredicateOperand(const MCInst *MI, unsigned OpNo,
55 void printATBitsAsHint(const MCInst *MI, unsigned OpNo,
58 void printU1ImmOperand(const MCInst *MI, unsigned OpNo,
60 void printU2ImmOperand(const MCInst *MI, unsigned OpNo,
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H A DPPCMCCodeEmitter.h21 #include "llvm/MC/MCInst.h"
38 unsigned getDirectBrEncoding(const MCInst &MI, unsigned OpNo,
41 unsigned getCondBrEncoding(const MCInst &MI, unsigned OpNo,
44 unsigned getAbsDirectBrEncoding(const MCInst &MI, unsigned OpNo,
47 unsigned getAbsCondBrEncoding(const MCInst &MI, unsigned OpNo,
50 unsigned getImm16Encoding(const MCInst &MI, unsigned OpNo,
53 uint64_t getImm34Encoding(const MCInst &MI, unsigned OpNo,
57 uint64_t getImm34EncodingNoPCRel(const MCInst &MI, unsigned OpNo,
60 uint64_t getImm34EncodingPCRel(const MCInst &MI, unsigned OpNo,
63 unsigned getDispRIEncoding(const MCInst
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ATTInstPrinter.h27 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29 bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
33 bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
34 void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
39 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
40 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &OS);
43 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &OS) override;
44 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &OS);
45 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &OS);
46 void printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O);
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H A DX86IntelInstPrinter.h28 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
30 bool printVecCompareInstr(const MCInst *MI, raw_ostream &OS);
34 bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &OS);
35 void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
40 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
41 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
44 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) override;
45 void printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O);
46 void printMemOffset(const MCInst *MI, unsigned OpNo, raw_ostream &O);
47 void printSrcIdx(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZInstPrinter.h31 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
32 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
48 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
53 void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
55 void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
58 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
59 void printOperand(const MCInst *MI, uint64_t /*Address*/, unsigned OpNum, in printOperand()
63 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
64 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
65 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/
H A DXtensaInstPrinter.h31 std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
32 void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O);
40 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
45 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
46 void printMemOperand(const MCInst *MI, int OpNUm, raw_ostream &O);
47 void printBranchTarget(const MCInst *MI, int OpNum, raw_ostream &O);
48 void printJumpTarget(const MCInst *MI, int OpNum, raw_ostream &O);
49 void printCallOperand(const MCInst *MI, int OpNum, raw_ostream &O);
50 void printL32RTarget(const MCInst *MI, int OpNum, raw_ostream &O);
52 void printImm8_AsmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiInstPrinter.h27 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
29 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
31 void printPredicateOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
32 void printMemRiOperand(const MCInst *MI, int OpNo, raw_ostream &O,
34 void printMemRrOperand(const MCInst *MI, int OpNo, raw_ostream &O,
36 void printMemSplsOperand(const MCInst *MI, int OpNo, raw_ostream &O,
38 void printCCOperand(const MCInst *MI, int OpNo, raw_ostream &O);
39 void printHi16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
40 void printHi16AndImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
41 void printLo16AndImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp14 #include "llvm/MC/MCInst.h"
35 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
56 /// immediate Value in the MCInst.
69 /// an MCExpr and that is added as an operand to the MCInst. If getOpInfo()
73 /// if it adds an operand to the MCInst and false otherwise. in tryAddingSymbolicOperand()
76 uint64_t Width, MCInst &MI, in tryAddingSymbolicOperand()
82 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
97 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGR32BitRegisterClass()
103 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeGRH32BitRegisterClass()
109 static DecodeStatus DecodeGR64BitRegisterClass(MCInst in DecodeGR64BitRegisterClass()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVInstPrinter.h29 void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
33 void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
35 void printBranchOperand(const MCInst *MI, uint64_t Address, unsigned OpNo,
37 void printCSRSystemRegister(const MCInst *MI, unsigned OpNo,
39 void printFenceArg(const MCInst *MI, unsigned OpNo,
41 void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
43 void printFRMArgLegacy(const MCInst *MI, unsigned OpNo,
45 void printFPImmOperand(const MCInst *MI, unsigned OpNo,
47 void printZeroOffsetMemOp(const MCInst *MI, unsigned OpNo,
49 void printVTypeI(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp35 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
65 static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm, in decodeCondBrTarget()
72 static DecodeStatus decodeDirectBrTarget(MCInst &Inst, unsigned Imm, in decodeDirectBrTarget()
84 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, in decodeRegisterClass()
92 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRRCRegisterClass()
98 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeCRBITRCRegisterClass()
104 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF4RCRegisterClass()
110 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeF8RCRegisterClass()
116 static DecodeStatus DecodeFpRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeFpRCRegisterClass()
124 static DecodeStatus DecodeVFRCRegisterClass(MCInst &Inst, uint64_t RegNo, in DecodeVFRCRegisterClass()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp73 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
82 static DecodeStatus DecodeGPR64RegisterClass(MCInst &Inst, unsigned RegNo,
86 static DecodeStatus DecodeCPU16RegsRegisterClass(MCInst &Inst, unsigned RegNo,
90 static DecodeStatus DecodeGPRMM16RegisterClass(MCInst &Inst, unsigned RegNo,
95 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
99 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address,
102 static DecodeStatus DecodeGPR32RegisterClass(MCInst &Inst, unsigned RegNo,
106 static DecodeStatus DecodePtrRegisterClass(MCInst &Inst, unsigned Insn,
110 static DecodeStatus DecodeDSPRRegisterClass(MCInst &Inst, unsigned RegNo,
114 static DecodeStatus DecodeFGR64RegisterClass(MCInst &Inst, unsigned RegNo,
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/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrAnalysis.h53 virtual void updateState(const MCInst &Inst, uint64_t Addr) {} in updateState()
55 virtual bool isBranch(const MCInst &Inst) const { in isBranch()
59 virtual bool isConditionalBranch(const MCInst &Inst) const { in isConditionalBranch()
63 virtual bool isUnconditionalBranch(const MCInst &Inst) const { in isUnconditionalBranch()
67 virtual bool isIndirectBranch(const MCInst &Inst) const { in isIndirectBranch()
71 virtual bool isCall(const MCInst &Inst) const { in isCall()
75 virtual bool isReturn(const MCInst &Inst) const { in isReturn()
79 virtual bool isTerminator(const MCInst &Inst) const { in isTerminator()
83 virtual bool mayAffectControlFlow(const MCInst &Inst, in mayAffectControlFlow()
116 const MCInst &Inst,
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