Home
last modified time | relevance | path

Searched refs:M0Val (Results 1 – 2 of 2) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp875 Register M0Val = MI.getOperand(6).getReg(); in selectInterpP1F16() local
876 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI) || in selectInterpP1F16()
893 .addReg(M0Val); in selectInterpP1F16()
1598 Register M0Val = MI.getOperand(2).getReg(); in selectDSOrderedIntrinsic() local
1600 .addReg(M0Val); in selectDSOrderedIntrinsic()
1610 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI)) in selectDSOrderedIntrinsic()
5548 Register M0Val; in selectNamedBarrierInst() local
5560 M0Val = TmpReg0; in selectNamedBarrierInst()
5573 M0Val = TmpReg1; in selectNamedBarrierInst()
5575 M0Val = BarOp.getReg(); in selectNamedBarrierInst()
[all …]
H A DSIISelLowering.cpp9337 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(2)); in LowerINTRINSIC_W_CHAIN() local
9338 Ops.push_back(M0Val.getValue(0)); in LowerINTRINSIC_W_CHAIN()
9741 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(3)); in LowerINTRINSIC_VOID() local
9763 Ops.push_back(M0Val.getValue(0)); // Chain in LowerINTRINSIC_VOID()
9764 Ops.push_back(M0Val.getValue(1)); // Glue in LowerINTRINSIC_VOID()
9811 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(3)); in LowerINTRINSIC_VOID() local
9846 Ops.push_back(M0Val.getValue(0)); // Chain in LowerINTRINSIC_VOID()
9847 Ops.push_back(M0Val.getValue(1)); // Glue in LowerINTRINSIC_VOID()
9923 SDValue M0Val; in LowerINTRINSIC_VOID() local
9925 M0Val = DAG.getNode(ISD::SHL, DL, MVT::i32, Op.getOperand(3), in LowerINTRINSIC_VOID()
[all …]