Lines Matching refs:M0Val
875 Register M0Val = MI.getOperand(6).getReg(); in selectInterpP1F16() local
876 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI) || in selectInterpP1F16()
893 .addReg(M0Val); in selectInterpP1F16()
1598 Register M0Val = MI.getOperand(2).getReg(); in selectDSOrderedIntrinsic() local
1600 .addReg(M0Val); in selectDSOrderedIntrinsic()
1610 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI)) in selectDSOrderedIntrinsic()
5548 Register M0Val; in selectNamedBarrierInst() local
5560 M0Val = TmpReg0; in selectNamedBarrierInst()
5573 M0Val = TmpReg1; in selectNamedBarrierInst()
5575 M0Val = BarOp.getReg(); in selectNamedBarrierInst()
5580 if (M0Val) { in selectNamedBarrierInst()
5582 BuildMI(*MBB, &I, DL, TII.get(AMDGPU::COPY), AMDGPU::M0).addReg(M0Val); in selectNamedBarrierInst()