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Searched refs:M0 (Results 1 – 25 of 111) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DInfoByHwMode.cpp152 unsigned M0 = Map.begin()->first; in operator <() local
153 return get(M0) < I.get(M0); in operator <()
157 unsigned M0 = Map.begin()->first; in operator ==() local
158 return get(M0) == I.get(M0); in operator ==()
162 unsigned M0 = Map.begin()->first; in isSubClassOf() local
163 return get(M0).isSubClassOf(I.get(M0)); in isSubClassOf()
168 unsigned M0 = Map.begin()->first; in hasStricterSpillThan() local
169 const RegSizeInfo &A0 = get(M0); in hasStricterSpillThan()
170 const RegSizeInfo &B0 = I.get(M0); in hasStricterSpillThan()
/freebsd/crypto/openssl/doc/designs/quic-design/images/
H A Dquic-concurrency-models.svg1 …M0 0h3575v1630H0Z" transform="scale(.33343)" clip-rule="evenodd"/></clipPath><clipPath clipPathUni…
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DDSDIRInstructions.td81 let Uses = [M0, EXEC];
133 (f32 (int_amdgcn_lds_direct_load M0)),
138 (f32 (int_amdgcn_lds_param_load timm:$attrchan, timm:$attr, M0)),
150 (f32 (int_amdgcn_lds_direct_load M0)),
155 (f32 (int_amdgcn_lds_param_load timm:$attrchan, timm:$attr, M0)),
H A DLDSDIRInstructions.td
H A DEXPInstructions.td25 let Uses = !if(_row, [EXEC, M0], [EXEC]);
60 // ROW variants have an implicit use of M0.
154 done_val, M0),
H A DVINTERPInstructions.td134 let Uses = [M0, EXEC, MODE] in {
140 } // Uses = [M0, EXEC, MODE]
142 let Uses = [M0, EXEC] in {
145 } // Uses = [M0, EXEC]
H A DSIFixSGPRCopies.cpp729 Src0.getReg() != AMDGPU::M0) && in run()
731 Src1.getReg() != AMDGPU::M0)) { in run()
762 TII->get(AMDGPU::COPY), AMDGPU::M0) in run()
764 Src1.ChangeToRegister(AMDGPU::M0, false); in run()
794 hoistAndMergeSGPRInits(AMDGPU::M0, *MRI, TRI, *MDT, TII); in run()
892 if (DstReg == AMDGPU::M0 && in lowerSpecialCase()
H A DSOPInstructions.td353 let Uses = [M0] in {
358 } // End Uses = [M0]
372 let Uses = [M0, MODE];
373 let Defs = [M0, MODE];
406 let Uses = [M0] in {
408 } // End Uses = [M0]
465 let Uses = [M0] in {
475 let Uses = [M0, SCC];
480 } // End Uses = [M0]
507 let Uses = [M0];
[all …]
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-x86_64.pl2139 my ($M0,$M1,$M2,$M3,$M4) = map("%zmm$_",(25..29));
2232 vpmuludq $T1,$S4,$M0
2238 vpaddq $M0,$D0,$D0 # d0 += r1'*5*r4
2244 vpmuludq $T2,$S3,$M0
2250 vpaddq $M0,$D0,$D0 # d0 += r2'*5*r3
2256 vpmuludq $T3,$S2,$M0
2261 vpaddq $M0,$D0,$D0 # d0 += r3'*5*r2
2269 vpmuludq $T4,$S1,$M0
2274 vpaddq $M0,$D0,$D0 # d0 += r2'*5*r1
2291 vpsrlq \$26,$D0,$M0
[all …]
/freebsd/crypto/openssl/crypto/bn/asm/
H A Darmv4-mont.pl305 my ($Bi,$Ni,$M0)=map("d$_",(28..31));
336 vld1.32 {${M0}[0]}, [$n0,:32]
348 vmul.u32 $Ni,$Ni,$M0
398 vmul.u32 $Ni,$Ni,$M0
469 vld1.32 {${M0}[0]},[$n0,:32]
489 vmul.u32 $Ni,$Ni,$M0
526 vmul.u32 $Ni,$Ni,$M0
/freebsd/sys/contrib/device-tree/Bindings/reset/
H A Dnxp,lpc1850-rgu.txt20 12 ARM Cortex-M0 subsystem core (LPC43xx only)
56 56 ARM Cortex-M0 application core (LPC4370 only)
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_onetimeauth/poly1305/sse2/
H A Dpoly1305_sse2.c208 xmmi M0, M1, M2, M3, M4; in poly1305_blocks() local
382 M0 = _mm_and_si128(MMASK, T5); in poly1305_blocks()
454 v04 = M0; in poly1305_blocks()
470 v14 = M0; in poly1305_blocks()
484 v24 = M0; in poly1305_blocks()
487 v34 = M0; in poly1305_blocks()
493 v44 = M0; in poly1305_blocks()
628 M0 = _mm_unpacklo_epi32(T7, _mm_setzero_si128()); in poly1305_blocks()
635 T0 = _mm_add_epi64(T0, M0); in poly1305_blocks()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEAsmPrinter.cpp175 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo()
213 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts()
259 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts()
305 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETTLSAddrAndEmitMCInsts()
/freebsd/contrib/bc/tests/bc/errors/
H A D23.txt120 100000000M0.0001 >> 5
/freebsd/crypto/openssl/demos/guide/
H A Dservercert.pem8 M0/uVMSgMbyEthRmRTkv4UufHqwxeKk0LlGi6IeZa+rqCkBObkcFiErc7ms+1IKO
H A Dserverkey.pem5 ATYxGfedqJPXUHNa4CrMpAY5ugsisA0KuaD0xrRD2dQ8Ub8pbibEKey+M0/uVMSg
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-i9300.dts3 * Samsung's Exynos4412 based M0 (GT-I9300) board device tree source
/freebsd/crypto/openssl/crypto/ec/asm/
H A Decp_nistz256-x86_64.pl2561 my ($M0,$T0a,$T0b,$T0c,$T0d,$T0e,$T0f,$TMP0)=map("%xmm$_",(8..15));
2630 movdqa $ONE, $M0
2636 movdqa $M0, $TMP0
2637 paddd $ONE, $M0
2740 movdqa .LOne(%rip), $M0
2748 movdqa $M0, $ONE
2753 movdqa $M0, $TMP0
2754 paddd $ONE, $M0
2803 my ($M0,$T0a,$T0b,$T0c,$TMP0)=map("%ymm$_",(5..9));
2839 vmovdqa .LOne(%rip), $M0
[all …]
/freebsd/contrib/ntp/include/
H A Dmbg_gps166.h880 l_fp M0; ///< +- Mean Anomaly at Ref. Time [rad] member
926 l_fp M0; ///< +- Mean Anomaly at Ref. Time [rad] member
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaRegisterInfo.td211 def M0 : SRReg<32, "m0", ["M0", "32"]>;
216 def MR01 : RegisterClass<"Xtensa", [i32], 32, (add M0, M1)>;
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DVectorUtils.cpp606 int M0 = M[i]; in widenShuffleMaskElts() local
610 if (M0 == -1 && M1 == -1) { in widenShuffleMaskElts()
615 if (M0 == -1 && M1 != -1 && (M1 % 2) == 1) { in widenShuffleMaskElts()
620 if (M0 != -1 && (M0 % 2) == 0 && ((M0 + 1) == M1 || M1 == -1)) { in widenShuffleMaskElts()
621 NewMask.push_back(M0 / 2); in widenShuffleMaskElts()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp82 MCPhysReg Reg = Xtensa::M0 + RegNo; in DecodeMRRegisterClass()
93 MCPhysReg Reg = Xtensa::M0 + RegNo; in DecodeMR01RegisterClass()
152 {Xtensa::M0, 32}, {Xtensa::M1, 33},
/freebsd/contrib/ntp/libparse/
H A Ddata_mbg.c443 FETCH_DOUBLE(buffpp, &ephp->M0); in get_mbg_eph()
484 FETCH_DOUBLE(buffpp, &almp->M0); in get_mbg_alm()
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-qcom-dc-scm-v1.dts107 /*M0-M7*/ "","","","","","","","",
H A Daspeed-bmc-vegman-n110.dts27 /*M0-M7*/ "","","","","","","","",

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