| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MachObjectWriter.cpp | 61 Log2Size = Log2_32(1); in getAArch64FixupKindMachOInfo()
64 Log2Size = Log2_32(2); in getAArch64FixupKindMachOInfo()
67 Log2Size = Log2_32(4); in getAArch64FixupKindMachOInfo()
72 Log2Size = Log2_32(8); in getAArch64FixupKindMachOInfo()
82 Log2Size = Log2_32(4); in getAArch64FixupKindMachOInfo()
97 Log2Size = Log2_32(4); in getAArch64FixupKindMachOInfo()
116 Log2Size = Log2_32(4); in getAArch64FixupKindMachOInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMachObjectWriter.cpp | 67 Log2Size = llvm::Log2_32(1); in getARMFixupKindMachOInfo()
70 Log2Size = llvm::Log2_32(2); in getARMFixupKindMachOInfo()
73 Log2Size = llvm::Log2_32(4); in getARMFixupKindMachOInfo()
76 Log2Size = llvm::Log2_32(8); in getARMFixupKindMachOInfo()
95 Log2Size = llvm::Log2_32(4); in getARMFixupKindMachOInfo()
102 Log2Size = llvm::Log2_32(4); in getARMFixupKindMachOInfo()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
| H A D | RISCVTargetParser.h | 115 unsigned LmulLog2 = Log2_32(LMUL); in encodeLMUL()
126 return Log2_32(SEW) - 3; in encodeSEW()
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/ |
| H A D | NativeRegisterContextDBReg_loongarch.cpp | 62 size_t encoded_size = (3 - llvm::Log2_32(size)) << 10; in MakeWatchControlValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86PartialReduction.cpp | 313 unsigned Stages = Log2_32(NumSplits); in trySADReplacement()
371 unsigned Stages = Log2_32(NumElems); in matchAddReduction()
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| H A D | X86SpeculativeLoadHardening.cpp | 1864 unsigned RegIdx = Log2_32(RegBytes); in canHardenRegister()
1914 unsigned SubRegImm = SubRegImms[Log2_32(Bytes)]; in hardenValueInRegister()
1927 unsigned OrOpCode = OrOpCodes[Log2_32(Bytes)]; in hardenValueInRegister()
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| H A D | X86CallFrameOptimization.cpp | 245 Log2SlotSize = Log2_32(SlotSize); in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 371 unsigned IndexLog2EEW = Log2_32(IndexVT.getScalarSizeInBits()); in selectVLXSEG()
444 unsigned IndexLog2EEW = Log2_32(IndexVT.getScalarSizeInBits()); in selectVSXSEG()
906 unsigned Log2SEW = Log2_32(Node->getConstantOperandVal(6)); in selectSF_VC_X_SE()
1919 Log2_32(Src1VT.getScalarSizeInBits()), DL, XLenVT); in Select()
2018 Log2_32(Src1VT.getScalarSizeInBits()), DL, XLenVT); in Select()
2204 unsigned Log2SEW = Log2_32(VT.getScalarSizeInBits()); in Select()
2220 unsigned IndexLog2EEW = Log2_32(IndexVT.getScalarSizeInBits()); in Select()
2247 unsigned Log2SEW = Log2_32(VT.getScalarSizeInBits()); in Select()
2287 unsigned Log2SEW = Log2_32(VT.getScalarSizeInBits()); in Select()
2317 unsigned Log2SEW = Log2_32(VT.getScalarSizeInBits()); in Select()
[all …]
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| H A D | RISCVOptWInstrs.cpp | 260 if (Bits >= Log2_32(ST.getXLen())) in hasAllNBitUsers()
272 if (OpIdx == 2 && Bits >= Log2_32(ST.getXLen())) in hasAllNBitUsers()
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| H A D | RISCVRegisterInfo.cpp | 439 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVSPILL()
522 uint32_t ShiftAmount = Log2_32(LMUL); in lowerVRELOAD()
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| H A D | RISCVInterleavedAccess.cpp | 386 return KB.countMinTrailingZeros() >= Log2_32(N); in isMultipleOfN()
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| /freebsd/contrib/llvm-project/llvm/lib/TargetParser/ |
| H A D | RISCVTargetParser.cpp | 178 unsigned TWiden = Log2_32(Widen) + 1; in encodeXSfmmVType()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.cpp | 776 return (Log2_32(Bits1) - Log2_32(Bits0)); in getElSizeLog2Diff()
778 return (Log2_32(Bits0) - Log2_32(Bits1)); in getElSizeLog2Diff()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchOptWInstrs.cpp | 253 if (Bits >= Log2_32(ST.getGRLen())) in hasAllNBitUsers()
264 if (OpIdx == 2 && Bits >= Log2_32(ST.getGRLen())) in hasAllNBitUsers()
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| H A D | LoongArchISelDAGToDAG.cpp | 303 if (lsb == 0 && Log2_32(ShiftWidth) <= msb + 1) { in selectShiftMask()
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| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | RegisterBankEmitter.cpp | 297 uint32_t BitSize = NextPowerOf2(Log2_32(NumRegBanks)); in emitBaseClassImplementation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCTargetDesc.cpp | 367 return Log2_32(Offset) << ELF::STO_PPC64_LOCAL_BIT; in encodePPC64LocalEntryOffset()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAGHVX.cpp | 1057 unsigned Shift = Log2_32(SegLen); in getInputSegmentList()
1116 unsigned Shift = Log2_32(SegLen); in packSegmentMask()
2230 assert(isPowerOf2_32(VecLen) && Log2_32(VecLen) <= 8); in perfect()
2231 unsigned LogLen = Log2_32(VecLen); in perfect()
2232 unsigned HwLog = Log2_32(HwLen); in perfect()
2338 Perm[I] = Log2_32(Pick[I]); in perfect()
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| H A D | HexagonPatterns.td | 202 def Log2_32: SDNodeXForm<imm, [{
204 return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32);
214 return CurDAG->getTargetConstant(Log2_32(NV), SDLoc(N), MVT::i32);
1963 (S2_setbit_i IntRegs:$Rs, (Log2_32 $V))>;
1965 (S2_togglebit_i IntRegs:$Rs, (Log2_32 $V))>;
2050 (S4_ntstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
2052 (S2_tstbit_i I32:$Rs, (Log2_32 imm:$u5))>;
2091 (I1toI32 (S4_ntstbit_i I32:$Rs, (Log2_32 imm:$u5)))>;
2093 (I1toI32 (S2_tstbit_i I32:$Rs, (Log2_32 imm:$u5)))>;
3042 return CurDAG->getTargetConstant(Log2_32(V), SDLoc(N), MVT::i32);
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCasts.cpp | 558 unsigned MaxShiftAmountWidth = Log2_32(NarrowWidth); in narrowFunnelShift()
931 if (AWidth == DestWidth && AWidth > Log2_32(SrcWidth)) { in visitTrunc()
945 if (Log2_32(*MaxVScale) < DestWidth) in visitTrunc()
1320 if (Log2_32(*MaxVScale) < TypeWidth) in visitZExt()
1609 if (Log2_32(*MaxVScale) < (SrcBitSize - 1)) in visitSExt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 3039 I.setDesc(TII.get(Opcodes[Log2_32(MemSizeInBytes)])); in select()
3051 I.setDesc(TII.get(Opcodes[Log2_32(MemSizeInBytes)])); in select()
5672 Opc = FPROpcodes[Log2_32(MemSize)]; in selectIndexedLoad()
5674 Opc = GPROpcodes[Log2_32(MemSize)]; in selectIndexedLoad()
5683 Opc = FPROpcodes[Log2_32(MemSize)]; in selectIndexedLoad()
5685 Opc = GPROpcodes[Log2_32(MemSize)]; in selectIndexedLoad()
5717 Opc = FPROpcodes[Log2_32(ValTy.getSizeInBytes())]; in selectIndexedStore()
5719 Opc = GPROpcodes[Log2_32(ValTy.getSizeInBytes())]; in selectIndexedStore()
5729 Opc = FPROpcodes[Log2_32(ValTy.getSizeInBytes())]; in selectIndexedStore()
5731 Opc = GPROpcodes[Log2_32(ValTy.getSizeInBytes())]; in selectIndexedStore()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILFlattenArrays.cpp | 333 VI = Builder.CreateLShr(VI, Builder.getInt32(Log2_32(BytesPerElem))); in visitGetElementPtrInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/AggressiveInstCombine/ |
| H A D | AggressiveInstCombine.cpp | 588 if (InputBits - Log2_32(InputBits) != ShiftConst && in tryToRecognizeTableBasedCttz()
589 InputBits - Log2_32(InputBits) - 1 != ShiftConst) in tryToRecognizeTableBasedCttz()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Object/ |
| H A D | COFF.h | 598 assert(llvm::Log2_32(Align) <= 13 && "alignment requested is too large"); in setAlignment()
599 AlignBits = (llvm::Log2_32(Align) + 1) << 20; in setAlignment()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 362 P2HalfMemSize = 1 << Log2_32(MemSize); in legalizeCustom()
|