| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 279 uint32_t LoLZ = llvm::countl_zero<uint32_t>(Lo_32(Imm)); in findContiguousZerosAtLeast()
297 uint32_t Lo32 = Lo_32(Imm); in selectI64ImmDirect()
614 uint32_t Hi16 = (Lo_32(Imm) >> 16) & 0xffff; in selectI64Imm()
615 uint32_t Lo16 = Lo_32(Imm) & 0xffff; in selectI64Imm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEFrameLowering.cpp | 243 .addImm(Lo_32(NumBytes)); in emitSPAdjustment()
253 .addImm(Lo_32(NumBytes)); in emitSPAdjustment()
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| H A D | VERegisterInfo.cpp | 209 build(VE::LEAzii, clobber).addImm(0).addImm(0).addImm(Lo_32(Offset)); in prepareReplaceFI()
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| H A D | VEInstrInfo.td | 55 return CurDAG->getTargetConstant(Lo_32(N->getZExtValue()),
73 return CurDAG->getTargetConstant(Lo_32(getFpImmVal(N) & 0xffffffff),
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | APInt.cpp | 1381 int64_t subres = int64_t(u[j+i]) - borrow - Lo_32(p); in KnuthDiv()
1382 u[j+i] = Lo_32(subres); in KnuthDiv()
1388 u[j+n] -= Lo_32(borrow); in KnuthDiv()
1396 q[j] = Lo_32(qp); in KnuthDiv()
1489 U[i * 2] = Lo_32(tmp); in divide()
1498 V[i * 2] = Lo_32(tmp); in divide()
1535 remainder = Lo_32(partial_dividend); in divide()
1540 Q[i] = Lo_32(partial_dividend / divisor); in divide()
1541 remainder = Lo_32(partial_dividend - (Q[i] * divisor)); in divide()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDKernelCodeTUtils.cpp | 382 MCConstantExpr::create(Lo_32(compute_pgm_resource_registers), Ctx); in initDefault()
478 OS.emitIntValue(Lo_32(compute_pgm_resource_registers), in EmitKernelCodeT()
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| H A D | AMDGPUBaseInfo.cpp | 3012 return !Lo_32(Val); in isValid32BitLiteral()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 198 unsigned LowerLeadingOnes = llvm::countl_one(Lo_32(Val)); in extractRotateInfo()
529 if (STI.hasFeature(RISCV::FeatureStdExtZba) && Lo_32(Val) == Hi_32(Val)) { in generateTwoRegInstSeq()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNPreRAOptimizations.cpp | 175 Init |= Lo_32(I.getOperand(1).getImm()); in processReg()
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| H A D | AMDGPUISelDAGToDAG.cpp | 425 CurDAG->getTargetConstant(Lo_32(Imm), DL, MVT::i32)); in buildSMovImm64()
1793 getMaterializedScalarImm32(Lo_32(RemainderOffset), DL); in SelectFlatOffsetImpl()
1922 !TII->isInlineConstant(APInt(32, Lo_32(COffsetVal))) + in SelectGlobalSAddr()
2021 ? getMaterializedScalarImm32(Lo_32(RemainderOffset), DL) in SelectScratchSAddr()
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| H A D | SIFrameLowering.cpp | 879 .addImm(Lo_32(Rsrc23)) in emitEntryFunctionScratchRsrcRegSetup()
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| H A D | AMDGPUInstructionSelector.cpp | 5449 !TII.isInlineConstant(APInt(32, Lo_32(ConstOffset))) + in selectGlobalSAddr()
6310 return Lo_32(*OffsetVal); in getConstantZext32Val()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUMCCodeEmitter.cpp | 259 return STI.hasFeature(AMDGPU::Feature64BitLiterals) && Lo_32(Val) ? 254 in getLit64Encoding()
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| H A D | AMDGPUInstPrinter.cpp | 85 if (STI.hasFeature(AMDGPU::Feature64BitLiterals) && Lo_32(Imm)) in printFP64ImmOperand()
622 if (STI.hasFeature(AMDGPU::Feature64BitLiterals) && Lo_32(Imm)) in printImmediate64()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | MathExtras.h | 160 constexpr uint32_t Lo_32(uint64_t Value) { in Lo_32() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenInsert.cpp | 663 return isInt<8>(Lo_32(V)) && isInt<8>(Hi_32(V)); in isSmallConstant()
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| H A D | HexagonBitSimplify.cpp | 1436 unsigned Lo = Lo_32(C), Hi = Hi_32(C); in genTfrConst()
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| H A D | HexagonConstPropagation.cpp | 2246 uint32_t U32 = Lo_32(U); in evaluate()
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | XCOFFObjectWriter.cpp | 872 W.write<uint32_t>(is64Bit() ? Lo_32(SectionOrLength) : SectionOrLength); in writeSymbolAuxCsectEntry()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 1012 unsigned LoLZ = llvm::countl_zero<uint32_t>(Lo_32(Imm)); in findContiguousZerosAtLeast()
1026 unsigned Lo32 = Lo_32(Imm); in selectI64ImmDirect()
1267 unsigned Lo32 = Lo_32(Imm); in selectI64ImmDirectPrefix()
1417 uint32_t Hi16OfLo32 = (Lo_32(Imm) >> 16) & 0xffff; in selectI64Imm()
1418 uint32_t Lo16OfLo32 = Lo_32(Imm) & 0xffff; in selectI64Imm()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1643 MCConstantExpr::create(Lo_32(Value), Context), Context); in processInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2449 Inst.addOperand(MCOperand::createImm(Lo_32(Val))); in addLiteralImmOperand()
2466 Val = Lo_32(Val); in addLiteralImmOperand()
2504 Inst.addOperand(MCOperand::createImm(Lo_32(Val))); in addLiteralImmOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 3415 if (Lo_32(ImmOp64) == 0) { in expandLoadSingleImmToFPR()
3458 if (Lo_32(ImmOp64) == 0) { in expandLoadDoubleImmToGPR()
3528 if ((Lo_32(ImmOp64) == 0) && in expandLoadDoubleImmToFPR()
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| /freebsd/contrib/llvm-project/llvm/lib/Support/Windows/ |
| H A D | Path.inc | 884 Hi_32(Size), Lo_32(Size), 0);
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| /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| H A D | RuntimeDyldELF.cpp | 1305 int32_t TruncOffset = Lo_32(RealOffset); in resolveRISCVRelocation()
|