Searched refs:LiveUnits (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 35 const LiveRegUnits &LiveUnits, in findUnusedRegister() argument
38 if (!MRI.isPhysRegUsed(Reg) && LiveUnits.available(Reg) && in findUnusedRegister()
50 MachineRegisterInfo &MRI, LiveRegUnits &LiveUnits, in findScratchNonCalleeSaveRegister() argument
55 LiveUnits.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
60 return findUnusedRegister(MRI, LiveUnits, RC); in findScratchNonCalleeSaveRegister()
63 if (LiveUnits.available(Reg) && !MRI.isReserved(Reg)) in findScratchNonCalleeSaveRegister()
73 MachineFunction &MF, LiveRegUnits &LiveUnits, Register SGPR, in getVGPRSpillLaneOrTempRegister() argument
91 ScratchSGPR = findUnusedRegister(MF.getRegInfo(), LiveUnits, RC); in getVGPRSpillLaneOrTempRegister()
125 LiveUnits.addReg(ScratchSGPR); in getVGPRSpillLaneOrTempRegister()
136 LiveRegUnits &LiveUnits, MachineFunction &MF, in buildPrologSpill() argument
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| H A D | SIRegisterInfo.cpp | 1333 RegScavenger *RS, LiveRegUnits *LiveUnits) const { in buildSpillLoadStore()
1334 assert((!RS || !LiveUnits) && "Only RS or LiveUnits can be set but not both"); in buildSpillLoadStore()
1430 } else if (LiveUnits) { in buildSpillLoadStore()
1431 CanClobberSCC = LiveUnits->available(AMDGPU::SCC); in buildSpillLoadStore()
1433 if (LiveUnits->available(Reg) && !MF->getRegInfo().isReserved(Reg)) { in buildSpillLoadStore()
1449 assert(LiveUnits); in buildSpillLoadStore()
1451 if (LiveUnits->available(Reg) && !MF->getRegInfo().isReserved(Reg)) { in buildSpillLoadStore()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveRegUnits.cpp | 88 static void addBlockLiveIns(LiveRegUnits &LiveUnits, in addBlockLiveIns() argument
91 LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask); in addBlockLiveIns()
95 static void addCalleeSavedRegs(LiveRegUnits &LiveUnits, in addCalleeSavedRegs() argument
107 LiveUnits.addReg(N); in addCalleeSavedRegs()
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| H A D | RegisterScavenging.cpp | 52 LiveUnits.addRegMasked(Reg, LaneMask); in setRegUsed()
60 LiveUnits.init(*TRI); in init()
72 LiveUnits.addLiveIns(MBB); in init()
78 LiveUnits.addLiveOuts(MBB); in init()
84 LiveUnits.stepBackward(MI); in enterBasicBlock()
98 return !LiveUnits.available(Reg); in addRegUnits()
307 *MRI, std::prev(MBBI), To, LiveUnits, AllocationOrder, RestoreAfter); in findSurvivorBackwards()
328 LiveUnits.removeReg(Reg); in findSurvivorBackwards()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FixupBWInsts.cpp | 142 LiveRegUnits LiveUnits; member in __anon46e815f70111::FixupBWInstPass
165 LiveUnits.init(TII->getRegisterInfo()); in runOnMachineFunction()
206 if ((I == E || *I > S) && LiveUnits.getBitVector().test(S)) { in getSuperRegDestIfDead()
442 LiveUnits.clear(); in processBasicBlock()
444 LiveUnits.addLiveOuts(MBB); in processBasicBlock()
454 LiveUnits.stepBackward(MI); in processBasicBlock()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterScavenging.h | 59 LiveRegUnits LiveUnits;
63 LiveRegUnits LiveUnits; global() variable
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