Lines Matching refs:LiveUnits
35 const LiveRegUnits &LiveUnits, in findUnusedRegister() argument
38 if (!MRI.isPhysRegUsed(Reg) && LiveUnits.available(Reg) && in findUnusedRegister()
50 MachineRegisterInfo &MRI, LiveRegUnits &LiveUnits, in findScratchNonCalleeSaveRegister() argument
55 LiveUnits.addReg(CSRegs[i]); in findScratchNonCalleeSaveRegister()
60 return findUnusedRegister(MRI, LiveUnits, RC); in findScratchNonCalleeSaveRegister()
63 if (LiveUnits.available(Reg) && !MRI.isReserved(Reg)) in findScratchNonCalleeSaveRegister()
73 MachineFunction &MF, LiveRegUnits &LiveUnits, Register SGPR, in getVGPRSpillLaneOrTempRegister() argument
91 ScratchSGPR = findUnusedRegister(MF.getRegInfo(), LiveUnits, RC); in getVGPRSpillLaneOrTempRegister()
125 LiveUnits.addReg(ScratchSGPR); in getVGPRSpillLaneOrTempRegister()
136 LiveRegUnits &LiveUnits, MachineFunction &MF, in buildPrologSpill() argument
149 LiveUnits.addReg(SpillReg); in buildPrologSpill()
152 DwordOff, MMO, nullptr, &LiveUnits); in buildPrologSpill()
154 LiveUnits.removeReg(SpillReg); in buildPrologSpill()
160 LiveRegUnits &LiveUnits, MachineFunction &MF, in buildEpilogRestore() argument
174 DwordOff, MMO, nullptr, &LiveUnits); in buildEpilogRestore()
202 static void initLiveUnits(LiveRegUnits &LiveUnits, const SIRegisterInfo &TRI, in initLiveUnits() argument
206 if (LiveUnits.empty()) { in initLiveUnits()
207 LiveUnits.init(TRI); in initLiveUnits()
209 LiveUnits.addLiveIns(MBB); in initLiveUnits()
212 LiveUnits.addLiveOuts(MBB); in initLiveUnits()
213 LiveUnits.stepBackward(*MBBI); in initLiveUnits()
235 LiveRegUnits &LiveUnits; member in llvm::PrologEpilogSGPRSpillBuilder
246 initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MI, /*IsProlog*/ true); in saveToMemory()
249 MRI, LiveUnits, AMDGPU::VGPR_32RegClass); in saveToMemory()
260 buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MI, DL, TmpVGPR, in saveToMemory()
295 initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MI, /*IsProlog*/ false); in restoreFromMemory()
297 MRI, LiveUnits, AMDGPU::VGPR_32RegClass); in restoreFromMemory()
306 buildEpilogRestore(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MI, DL, in restoreFromMemory()
343 LiveRegUnits &LiveUnits, Register FrameReg) in PrologEpilogSGPRSpillBuilder() argument
347 SuperReg(Reg), SI(SI), LiveUnits(LiveUnits), DL(DL), in PrologEpilogSGPRSpillBuilder()
405 LiveRegUnits LiveUnits; in emitEntryFunctionFlatScratchInit() local
406 LiveUnits.init(*TRI); in emitEntryFunctionFlatScratchInit()
407 LiveUnits.addLiveIns(MBB); in emitEntryFunctionFlatScratchInit()
418 if (LiveUnits.available(Reg) && !MRI.isReserved(Reg) && in emitEntryFunctionFlatScratchInit()
887 static Register buildScratchExecCopy(LiveRegUnits &LiveUnits, in buildScratchExecCopy() argument
900 initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MBBI, IsProlog); in buildScratchExecCopy()
903 MRI, LiveUnits, *TRI.getWaveMaskRegClass()); in buildScratchExecCopy()
907 LiveUnits.addReg(ScratchExecCopy); in buildScratchExecCopy()
923 MachineBasicBlock::iterator MBBI, DebugLoc &DL, LiveRegUnits &LiveUnits, in emitCSRSpillStores() argument
938 buildScratchExecCopy(LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillStores()
946 buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillStores()
957 ScratchExecCopy = buildScratchExecCopy(LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillStores()
969 LiveUnits.addReg(ScratchExecCopy); in emitCSRSpillStores()
985 LiveUnits, FrameReg); in emitCSRSpillStores()
1000 if (!LiveUnits.empty()) { in emitCSRSpillStores()
1002 LiveUnits.addReg(Reg); in emitCSRSpillStores()
1009 MachineBasicBlock::iterator MBBI, DebugLoc &DL, LiveRegUnits &LiveUnits, in emitCSRSpillRestores() argument
1029 LiveUnits, FrameReg); in emitCSRSpillRestores()
1041 buildScratchExecCopy(LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillRestores()
1049 buildEpilogRestore(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillRestores()
1060 ScratchExecCopy = buildScratchExecCopy(LiveUnits, MF, MBB, MBBI, DL, in emitCSRSpillRestores()
1093 LiveRegUnits LiveUnits; in emitPrologue() local
1123 emitCSRSpillStores(MF, MBB, MBBI, DL, LiveUnits, in emitPrologue()
1131 initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ true); in emitPrologue()
1139 DL, TII, TRI, LiveUnits, FramePtrReg); in emitPrologue()
1141 LiveUnits.addReg(SGPRForFPSaveRestoreCopy); in emitPrologue()
1146 MRI, LiveUnits, AMDGPU::SReg_32_XM0_XEXECRegClass); in emitPrologue()
1150 LiveUnits.addReg(FramePtrRegScratchCopy); in emitPrologue()
1160 if (LiveUnits.empty()) { in emitPrologue()
1161 LiveUnits.init(TRI); in emitPrologue()
1162 LiveUnits.addLiveIns(MBB); in emitPrologue()
1185 emitCSRSpillStores(MF, MBB, MBBI, DL, LiveUnits, FramePtrReg, in emitPrologue()
1188 LiveUnits.removeReg(FramePtrRegScratchCopy); in emitPrologue()
1237 LiveRegUnits LiveUnits; in emitEpilogue() local
1267 initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MBBI, /*IsProlog*/ false); in emitEpilogue()
1269 LiveUnits.addReg(SGPRForFPSaveRestoreCopy); in emitEpilogue()
1272 MRI, LiveUnits, AMDGPU::SReg_32_XM0_XEXECRegClass); in emitEpilogue()
1276 LiveUnits.addReg(FramePtrRegScratchCopy); in emitEpilogue()
1279 emitCSRSpillRestores(MF, MBB, MBBI, DL, LiveUnits, FramePtrReg, in emitEpilogue()
1302 emitCSRSpillRestores(MF, MBB, MBBI, DL, LiveUnits, StackPtrReg, in emitEpilogue()
1503 LiveRegUnits LiveUnits; in determinePrologEpilogSGPRSaves() local
1504 LiveUnits.init(*TRI); in determinePrologEpilogSGPRSaves()
1509 LiveUnits.addReg(CSRegs[I]); in determinePrologEpilogSGPRSaves()
1518 Register UnusedScratchReg = findUnusedRegister(MRI, LiveUnits, RC); in determinePrologEpilogSGPRSaves()
1524 LiveUnits.addReg(UnusedScratchReg); in determinePrologEpilogSGPRSaves()
1529 getVGPRSpillLaneOrTempRegister(MF, LiveUnits, ReservedRegForExecCopy, RC, in determinePrologEpilogSGPRSaves()
1554 getVGPRSpillLaneOrTempRegister(MF, LiveUnits, FramePtrReg); in determinePrologEpilogSGPRSaves()
1561 getVGPRSpillLaneOrTempRegister(MF, LiveUnits, BasePtrReg); in determinePrologEpilogSGPRSaves()