| /freebsd/sys/powerpc/booke/ |
| H A D | trap_subr.S | 136 LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \
163 LOAD %r1, PC_CURPCB(%r1); /* Per-thread kernel stack */ \
268 LOAD %r30, (savearea+CPUSAVE_R30)(%r2); /* get saved r30 */ \
269 LOAD %r31, (savearea+CPUSAVE_R31)(%r2); /* get saved r31 */ \
273 LOAD %r28, (savearea+CPUSAVE_BOOKE_DEAR)(%r2); \
274 LOAD %r29, (savearea+CPUSAVE_BOOKE_ESR)(%r2); \
288 LOAD %r30, (savearea+CPUSAVE_SRR0)(%r2); \
289 LOAD %r31, (savearea+CPUSAVE_SRR1)(%r2); \
292 LOAD THREAD_REG, PC_CURTHREAD(%r2); \
305 LOAD %r4, FRAME_CTR+CALLSIZE(%r1); \
[all …]
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| /freebsd/sys/powerpc/powerpc/ |
| H A D | support.S | 55 #define LOAD ld macro
65 #define LOAD lwz macro
156 LOAD rpcb, TD_PCB(CURTHREAD) ;\
162 LOAD rpcb, TD_PCB(CURTHREAD) ;\
168 LOAD rpcb, TD_PCB(CURTHREAD) ;\
172 LOAD rpcb, TD_PCB(CURTHREAD) ;\
226 LOAD t1, 0(rs)
227 LOAD t2, WORD*1(rs)
228 LOAD t3, WORD*2(rs)
229 LOAD t4, WORD*3(rs)
[all …]
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| /freebsd/tools/test/stress2/misc/ |
| H A D | mlockall2.sh | 126 pid_t pids[LOAD], pids2[PARALLEL];
129 size = atol(argv[1]) / LOAD * 1.5;
130 for (i = 0; i < LOAD; i++)
158 for (i = 0; i < LOAD; i++)
160 for (i = 0; i < LOAD; i++)
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| H A D | tmpfs20.sh | 45 export LOAD=80
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| H A D | tmpfs27.sh | 27 export LOAD=70
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| H A D | badcode.sh | 47 export LOAD=80
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| H A D | symlink3.sh | 48 export LOAD=100
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| /freebsd/sys/contrib/openzfs/module/zfs/ |
| H A D | vdev_raidz_math_impl.h | 206 LOAD(src + i, COPY_D); in raidz_copy_abd_cb()
209 LOAD(src + i + COPY_STRIDE, COPY_D); in raidz_copy_abd_cb()
246 LOAD(dst + i, ADD_D); in raidz_add_abd_cb()
250 LOAD(dst + i + ADD_STRIDE, ADD_D); in raidz_add_abd_cb()
283 LOAD(d + i, MUL_D); in raidz_mul_abd_cb()
287 LOAD(d + i + MUL_STRIDE, MUL_D); in raidz_mul_abd_cb()
303 LOAD((t), T); \
310 LOAD((t), T); \
318 LOAD((t), T); \
325 LOAD((t), T); \
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepIICHVX.td | 124 InstrItinData <tc_0390c1ca, /*SLOT01,LOAD,VA,VX_DV*/
195 InstrItinData <tc_1ba8a0cd, /*SLOT01,LOAD,VA*/
253 InstrItinData <tc_3904b926, /*SLOT01,LOAD*/
268 InstrItinData <tc_3c56e5ce, /*SLOT0,NOSLOT1,LOAD,VP*/
297 InstrItinData <tc_453fe68d, /*SLOT01,LOAD,VA*/
318 InstrItinData <tc_52447ecc, /*SLOT01,LOAD*/
384 InstrItinData <tc_663c80a7, /*SLOT01,LOAD*/
399 InstrItinData <tc_7095ecba, /*SLOT1,LOAD,VA_DV*/
446 InstrItinData <tc_7d68d5c2, /*SLOT1,LOAD,VA*/
488 InstrItinData <tc_9a1cab75, /*SLOT01,LOAD,VA,VX_DV*/
[all …]
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| /freebsd/sys/contrib/openzfs/scripts/ |
| H A D | zfs.sh | 16 LOAD="yes"
55 LOAD="yes"
59 LOAD="no"
226 if [ "$LOAD" = "yes" ]; then
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| /freebsd/contrib/ntp/sntp/libevent/ |
| H A D | evthread_win32.c | 114 #define LOAD(name) \ in evthread_win32_condvar_init() macro
116 LOAD(InitializeConditionVariable); in evthread_win32_condvar_init()
117 LOAD(SleepConditionVariableCS); in evthread_win32_condvar_init()
118 LOAD(WakeAllConditionVariable); in evthread_win32_condvar_init()
119 LOAD(WakeConditionVariable); in evthread_win32_condvar_init()
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| /freebsd/crypto/openssl/crypto/ |
| H A D | mem.c | 31 # define LOAD(x) 0 macro
38 # define LOAD(x) tsan_load(&x) macro
88 *mcount = LOAD(malloc_count); in CRYPTO_get_alloc_counts()
90 *rcount = LOAD(realloc_count); in CRYPTO_get_alloc_counts()
92 *fcount = LOAD(free_count); in CRYPTO_get_alloc_counts()
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| /freebsd/contrib/libevent/ |
| H A D | evthread_win32.c | 114 #define LOAD(name) \ in evthread_win32_condvar_init() macro
116 LOAD(InitializeConditionVariable); in evthread_win32_condvar_init()
117 LOAD(SleepConditionVariableCS); in evthread_win32_condvar_init()
118 LOAD(WakeAllConditionVariable); in evthread_win32_condvar_init()
119 LOAD(WakeConditionVariable); in evthread_win32_condvar_init()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPatterns.td | 39 // with LOAD, OPERATOR and STORE being the read, modify and write
57 // The inserted operand is loaded using LOAD from an address of mode MODE.
97 // condition is false. Record that they are equivalent to a LOAD/select/STORE
114 // Try to use MVC instruction INSN for a load of type LOAD followed by a store
116 // LENGTH is the number of bytes loaded by LOAD.
124 // The other operand is a load of type LOAD, which accesses LENGTH bytes.
134 // LOAD/VT/LENGTH combination.
147 // Record that INSN is a LOAD AND TEST that can be used to compare
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| /freebsd/stand/i386/mbr/ |
| H A D | mbr.S | 18 .set LOAD,0x7c00 # Load address define
37 movw $LOAD,%sp # stack
42 movw $main-EXEC+LOAD,%si # Source
50 jmp main-LOAD+EXEC # To relocated code
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIMemoryLegalizer.cpp | 46 LOAD = 1u << 0, enumerator
1058 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1066 if (Op == SIMemOp::LOAD) in enableVolatileAndOrNonTemporal()
1239 return insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE, in insertRelease()
1411 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1419 if (Op == SIMemOp::LOAD) in enableVolatileAndOrNonTemporal()
1713 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1884 Changed |= insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE, in insertRelease()
1946 assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE); in enableVolatileAndOrNonTemporal()
1954 if (Op == SIMemOp::LOAD) { in enableVolatileAndOrNonTemporal()
[all …]
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| H A D | AMDGPUISelLowering.cpp | 75 setOperationAction(ISD::LOAD, MVT::f32, Promote); in AMDGPUTargetLowering()
76 AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); in AMDGPUTargetLowering()
78 setOperationAction(ISD::LOAD, MVT::v2f32, Promote); in AMDGPUTargetLowering()
79 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32); in AMDGPUTargetLowering()
81 setOperationAction(ISD::LOAD, MVT::v3f32, Promote); in AMDGPUTargetLowering()
82 AddPromotedToType(ISD::LOAD, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
84 setOperationAction(ISD::LOAD, MVT::v4f32, Promote); in AMDGPUTargetLowering()
85 AddPromotedToType(ISD::LOAD, MVT::v4f32, MVT::v4i32); in AMDGPUTargetLowering()
87 setOperationAction(ISD::LOAD, MVT::v5f32, Promote); in AMDGPUTargetLowering()
88 AddPromotedToType(ISD::LOAD, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering()
[all …]
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| /freebsd/sys/contrib/libsodium/src/libsodium/crypto_generichash/blake2b/ref/ |
| H A D | blake2b-compress-avx2.h | 8 #define LOAD(p) _mm256_load_si256((__m256i *) (p)) macro
127 __m256i c = LOAD(&blake2b_IV[0]); \
129 XOR(LOAD(&blake2b_IV[4]), _mm256_set_epi64x(f1, f0, t1, t0)); \
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| /freebsd/contrib/llvm-project/lld/MachO/Arch/ |
| H A D | ARM64_32.cpp | 54 B(ABSOLUTE) | B(EXTERN) | B(GOT) | B(LOAD) | B(BYTE4)},
58 B(ABSOLUTE) | B(EXTERN) | B(TLV) | B(LOAD) | B(BYTE4)},
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86PfmCounters.td | 24 PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
226 PfmValidationCounter<L1DCacheLoadMiss, "L1-DCACHE-LOAD-MISSES">,
228 PfmValidationCounter<L1ICacheLoadMiss, "L1-ICACHE-LOAD-MISSES">,
229 PfmValidationCounter<DataTLBLoadMiss, "DTLB-LOAD-MISSES">,
230 PfmValidationCounter<InstructionTLBLoadMiss, "ITLB-LOAD-MISSES">,
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| /freebsd/stand/i386/pmbr/ |
| H A D | pmbr.S | 36 .set LOAD,0x7c00 # Load address define
75 movw $main-EXEC+LOAD,%si # Source
83 jmp main-LOAD+EXEC # To relocated code
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| /freebsd/tools/test/stress2/tools/ |
| H A D | rwatch.sh | 31 unset LOAD
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| /freebsd/tools/test/stress2/ |
| H A D | marcus.cfg | 8 export LOAD=80
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| H A D | default.cfg | 14 export LOAD=${LOAD:-20}
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| /freebsd/stand/i386/boot0/ |
| H A D | boot0.S | 125 .set LOAD,0x7c00 # Load address define
177 movw $LOAD,%sp # stack
199 jmp main-LOAD+ORIGIN # Jump to relocated code
477 3: movw $LOAD,%bx # Address for read
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