| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 202 Register emitAddSub_rr(bool UseAdd, MVT RetVT, Register LHSReg,
205 Register emitAddSub_ri(bool UseAdd, MVT RetVT, Register LHSReg, uint64_t Imm,
207 Register emitAddSub_rs(bool UseAdd, MVT RetVT, Register LHSReg,
211 Register emitAddSub_rx(bool UseAdd, MVT RetVT, Register LHSReg,
220 bool emitICmp_ri(MVT RetVT, Register LHSReg, uint64_t Imm);
237 Register emitSubs_rr(MVT RetVT, Register LHSReg, Register RHSReg,
239 Register emitSubs_rs(MVT RetVT, Register LHSReg, Register RHSReg,
244 Register emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, Register LHSReg,
246 Register emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, Register LHSReg,
248 Register emitAnd_ri(MVT RetVT, Register LHSReg, uint64_t Imm);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
504 unsigned LHSReg, unsigned RHSReg, in validOpRegPair() argument
507 return MRI.getType(LHSReg) == MRI.getType(RHSReg) && in validOpRegPair()
508 validReg(MRI, LHSReg, ExpectedSize, ExpectedRegBankID) && in validOpRegPair()
545 auto LHSReg = MIB.getReg(2); in selectCmp() local
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
557 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg, in selectCmp()
563 if (!insertComparison(Helper, I, IntermediateRes, ARMConds.first, LHSReg, in selectCmp()
566 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg, in selectCmp()
578 unsigned LHSReg, unsigned RHSReg, in insertComparison() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2139 Register LHSReg = getRegForValue(LHS); in X86FastEmitCMoveSelect() local
2140 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2146 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2194 Register LHSReg = getRegForValue(LHS); in X86FastEmitSSESelect() local
2198 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2225 ImplicitDefReg, LHSReg); in X86FastEmitSSESelect()
2246 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2267 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2339 Register LHSReg = getRegForValue(LHS); in X86FastEmitPseudoSelect() local
2341 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3153 Register LHSReg = MI.getOperand(1).getReg(); in matchHoistLogicOpWithSameOpcodeHands() local
3157 if (!MRI.hasOneNonDBGUse(LHSReg) || !MRI.hasOneNonDBGUse(RHSReg)) in matchHoistLogicOpWithSameOpcodeHands()
3161 MachineInstr *LeftHandInst = getDefIgnoringCopies(LHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
5025 Register LHSReg = MI.getOperand(1).getReg(); in matchReassocCommBinOp() local
5028 if (tryReassocBinOp(Opc, DstReg, LHSReg, RHSReg, MatchInfo)) in matchReassocCommBinOp()
5030 if (tryReassocBinOp(Opc, DstReg, RHSReg, LHSReg, MatchInfo)) in matchReassocCommBinOp()
6326 Register LHSReg = MI.getOperand(1).getReg(); in matchCombineFSubFNegFMulToFMadOrFMA() local
6335 if (mi_match(LHSReg, MRI, m_GFNeg(m_MInstr(FMulMI))) && in matchCombineFSubFNegFMulToFMadOrFMA()
6336 (Aggressive || (MRI.hasOneNonDBGUse(LHSReg) && in matchCombineFSubFNegFMulToFMadOrFMA()
6357 FMulMI->getOperand(2).getReg(), LHSReg}); in matchCombineFSubFNegFMulToFMadOrFMA()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 310 Register LHSReg = getRegForValue(LHS); in emitLogicalOp() local
311 if (!LHSReg) in emitLogicalOp()
326 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg); in emitLogicalOp()
|