| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 207 unsigned emitAddSub_rr(bool UseAdd, MVT RetVT, unsigned LHSReg,
210 unsigned emitAddSub_ri(bool UseAdd, MVT RetVT, unsigned LHSReg,
213 unsigned emitAddSub_rs(bool UseAdd, MVT RetVT, unsigned LHSReg,
217 unsigned emitAddSub_rx(bool UseAdd, MVT RetVT, unsigned LHSReg,
226 bool emitICmp_ri(MVT RetVT, unsigned LHSReg, uint64_t Imm);
243 unsigned emitSubs_rr(MVT RetVT, unsigned LHSReg, unsigned RHSReg,
245 unsigned emitSubs_rs(MVT RetVT, unsigned LHSReg, unsigned RHSReg,
250 unsigned emitLogicalOp_ri(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
252 unsigned emitLogicalOp_rs(unsigned ISDOpc, MVT RetVT, unsigned LHSReg,
254 unsigned emitAnd_ri(MVT RetVT, unsigned LHSReg, uint64_t Imm);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
504 unsigned LHSReg, unsigned RHSReg, in validOpRegPair() argument
507 return MRI.getType(LHSReg) == MRI.getType(RHSReg) && in validOpRegPair()
508 validReg(MRI, LHSReg, ExpectedSize, ExpectedRegBankID) && in validOpRegPair()
545 auto LHSReg = MIB.getReg(2); in selectCmp() local
547 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
557 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg, in selectCmp()
563 if (!insertComparison(Helper, I, IntermediateRes, ARMConds.first, LHSReg, in selectCmp()
566 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg, in selectCmp()
578 unsigned LHSReg, unsigned RHSReg, in insertComparison() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2133 Register LHSReg = getRegForValue(LHS); in X86FastEmitCMoveSelect() local
2134 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2140 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2188 Register LHSReg = getRegForValue(LHS); in X86FastEmitSSESelect() local
2192 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2219 ImplicitDefReg, LHSReg); in X86FastEmitSSESelect()
2240 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2261 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2333 Register LHSReg = getRegForValue(LHS); in X86FastEmitPseudoSelect() local
2335 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 3118 Register LHSReg = MI.getOperand(1).getReg(); in matchHoistLogicOpWithSameOpcodeHands() local
3122 if (!MRI.hasOneNonDBGUse(LHSReg) || !MRI.hasOneNonDBGUse(RHSReg)) in matchHoistLogicOpWithSameOpcodeHands()
3126 MachineInstr *LeftHandInst = getDefIgnoringCopies(LHSReg, MRI); in matchHoistLogicOpWithSameOpcodeHands()
4898 Register LHSReg = MI.getOperand(1).getReg(); in matchReassocCommBinOp() local
4901 if (tryReassocBinOp(Opc, DstReg, LHSReg, RHSReg, MatchInfo)) in matchReassocCommBinOp()
4903 if (tryReassocBinOp(Opc, DstReg, RHSReg, LHSReg, MatchInfo)) in matchReassocCommBinOp()
6082 Register LHSReg = MI.getOperand(1).getReg(); in matchCombineFSubFNegFMulToFMadOrFMA() local
6091 if (mi_match(LHSReg, MRI, m_GFNeg(m_MInstr(FMulMI))) && in matchCombineFSubFNegFMulToFMadOrFMA()
6092 (Aggressive || (MRI.hasOneNonDBGUse(LHSReg) && in matchCombineFSubFNegFMulToFMadOrFMA()
6113 FMulMI->getOperand(2).getReg(), LHSReg}); in matchCombineFSubFNegFMulToFMadOrFMA()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 312 Register LHSReg = getRegForValue(LHS); in emitLogicalOp() local
313 if (!LHSReg) in emitLogicalOp()
328 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg); in emitLogicalOp()
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