Lines Matching refs:LHSReg

2133   Register LHSReg = getRegForValue(LHS);  in X86FastEmitCMoveSelect()  local
2134 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2140 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2188 Register LHSReg = getRegForValue(LHS); in X86FastEmitSSESelect() local
2192 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2219 ImplicitDefReg, LHSReg); in X86FastEmitSSESelect()
2240 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2261 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2333 Register LHSReg = getRegForValue(LHS); in X86FastEmitPseudoSelect() local
2335 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
2341 fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitPseudoSelect()
2890 Register LHSReg = getRegForValue(LHS); in fastLowerIntrinsicCall() local
2891 if (LHSReg == 0) in fastLowerIntrinsicCall()
2909 .addReg(LHSReg); in fastLowerIntrinsicCall()
2911 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, CI->getZExtValue()); in fastLowerIntrinsicCall()
2919 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, RHSReg); in fastLowerIntrinsicCall()
2932 .addReg(LHSReg); in fastLowerIntrinsicCall()
2943 .addReg(LHSReg); in fastLowerIntrinsicCall()
2947 TLI.getRegClassFor(VT), LHSReg, RHSReg); in fastLowerIntrinsicCall()
3074 Register LHSReg = getRegForValue(LHS); in fastLowerIntrinsicCall() local
3076 if (!LHSReg || !RHSReg) in fastLowerIntrinsicCall()
3079 Register ResultReg = fastEmitInst_rr(Opc, RC, LHSReg, RHSReg); in fastLowerIntrinsicCall()