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Searched refs:LFIWZX (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h533 LFIWZX, enumerator
H A DPPCInstrVSX.td1052 // 1: The input is primarily for loads that load a partial vector(LFIWZX,
1128 // Pseudo instruction LIWZX will be expanded to LXSIWZX or LFIWZX later
2855 (v4f32 (XXSPLTW (SUBREG_TO_REG (i64 1), (LFIWZX ForceXForm:$A), sub_64), 1))>;
2859 (v4i32 (XXSPLTW (SUBREG_TO_REG (i64 1), (LFIWZX ForceXForm:$A), sub_64), 1))>;
2861 (v2i64 (XXPERMDIs (LFIWZX ForceXForm:$A), 0))>;
2956 // each of the loads which would otherwise be able to use LFIWZX.
3081 // each of the loads which would otherwise be able to use LFIWZX.
H A DP10InstrResources.td1268 LFIWZX, LIWZX,
H A DP9InstrResources.td766 LFIWZX,
H A DPPCFastISel.cpp1043 LoadOpc = PPC::LFIWZX; in PPCMoveToFPReg()
H A DPPCISelLowering.cpp1754 case PPCISD::LFIWZX: return "PPCISD::LFIWZX"; in getTargetNodeName()
8890 Bits = DAG.getMemIntrinsicNode(PPCISD::LFIWZX, dl, in LowerINT_TO_FP()
8924 PPCISD::LFIWZX : PPCISD::LFIWAX, in LowerINT_TO_FP()
8984 Ld = DAG.getMemIntrinsicNode(IsSigned ? PPCISD::LFIWAX : PPCISD::LFIWZX, dl, in LowerINT_TO_FP()
H A DPPCInstrInfo.cpp3053 LowerOpcode = PPC::LFIWZX; in expandVSXMemPseudo()
H A DPPCInstrInfo.td174 def PPClfiwzx : SDNode<"PPCISD::LFIWZX", SDT_PPClfiwx,
2084 def LFIWZX : XForm_25_memOp<31, 887, (outs f8rc:$RST), (ins (memrr $RA, $RB):$addr),