Searched refs:LDM (Results 1 – 15 of 15) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
H A D | AddDiscriminators.cpp | 160 LocationDiscriminatorMap LDM; in addDiscriminators() 187 unsigned Discriminator = R.second ? ++LDM[L] : LDM[L]; in addDiscriminators() 224 unsigned Discriminator = ++LDM[L]; in addDiscriminators() 163 LocationDiscriminatorMap LDM; addDiscriminators() local
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/freebsd/crypto/openssl/crypto/sha/asm/ |
H A D | sha512-parisc.pl | 72 $LDM="ldd,ma"; 84 $LDM="ldwm"; 136 `"$LDM $SZ($Tbl),$t1" if ($i<15)` 158 $LDM $SZ($Tbl),$t1 301 $LDM $SZ($Tbl),$t1
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/freebsd/contrib/llvm-project/libunwind/src/ |
H A D | UnwindRegistersRestore.S | 736 @ . the pc (r15) and lr (r14) cannot both be in the list in an LDM instruction
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMScheduleM4.td | 55 def : M4UnitL2I<(instregex "(t|t2)LDM")>;
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H A D | ARMScheduleR52.td | 480 (instregex "LDM(IA|DA|DB|IB)$", "t2LDM(IA|DA|DB|IB)$", 481 "(t|sys)LDM(IA|DA|DB|IB)$")>; 483 (instregex "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
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H A D | ARMScheduleSwift.td | 482 (instregex "LDM(IA|DA|DB|IB)$", "t2LDM(IA|DA|DB|IB)$", 483 "(t|sys)LDM(IA|DA|DB|IB)$")>; 486 "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
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H A D | ARMScheduleM7.td | 243 (instregex "(t|t2)LDM(DB|IA)$")>; 247 (instregex "(t|t2)LDM(DB|IA)_UPD$", "tPOP")>;
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H A D | ARMScheduleA9.td | 2049 // Define a predicate to select the LDM based on number of memory addresses. 2058 // LDM/VLDM/VLDn address generation latency & resources. 2069 // For unknown LDM/VLDM/VSTM, assume 2 32-bit registers. 2072 // Define LDM Resources. 2092 // LDM: Load multiple into 32-bit integer registers. 2247 // tuple, unlike LDM. So the number of write operands is not variadic. 2253 // Resources for other (non-LDM/VLDM) Variants.
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H A D | ARMSchedule.td | 189 // LDM, base reg in list
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H A D | ARMBaseInstrInfo.cpp | 1640 MachineInstrBuilder LDM, STM; in expandMEMCPY() local 1643 LDM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2LDMIA_UPD in expandMEMCPY() 1648 LDM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2LDMIA : ARM::LDMIA)); in expandMEMCPY() 1662 LDM.add(LDBase).add(predOps(ARMCC::AL)); in expandMEMCPY() 1679 LDM.addReg(Reg, RegState::Define); in expandMEMCPY()
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H A D | ARMScheduleA57.td | 589 def : InstRW<[A57WriteLDM], (instregex "(t|t2|sys)?LDM(IA|DA|DB|IB)$")>; 593 (instregex "(t|t2|sys)?LDM(IA_UPD|DA_UPD|DB_UPD|IB_UPD|IA_RET)", "tPOP")>;
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H A D | ARMInstrThumb.td | 1661 // post-inc LDR -> LDM r0!, {r1}. The way operands are layed out in LDMs is
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H A D | ARMInstrInfo.td | 3571 defm LDM : arm_ldst_mult<"ldm", "", 1, 0, LdStMulFrm, IIC_iLoad_m, 6270 // PUSH/POP aliases for STM/LDM
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H A D | ARMInstrThumb2.td | 5166 // PUSH/POP aliases for STM/LDM
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/freebsd/usr.sbin/services_mkdb/ |
H A D | services | 627 unidata-ldm 388/tcp #Unidata LDM Version 4 628 unidata-ldm 388/udp #Unidata LDM Version 4
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