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Searched refs:Kill (Results 1 – 25 of 130) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp71 .addReg(STI.getTmpRegister(), RegState::Kill) in emitPrologue()
78 .addReg(STI.getTmpRegister(), RegState::Kill) in emitPrologue()
82 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
86 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
87 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
126 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
157 .addReg(STI.getTmpRegister(), RegState::Kill); in restoreStatusRegister()
213 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
221 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
377 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all...]
H A DAVRExpandPseudoInsts.cpp469 .addReg(DstHiReg, RegState::Kill); in expand()
720 .addReg(SrcReg, RegState::Kill); in expand()
726 .addReg(SrcReg, RegState::Kill); in expand()
753 .addReg(SrcReg, RegState::Kill); in expand()
759 .addReg(SrcReg, RegState::Kill); in expand()
878 .addReg(AVR::R0, RegState::Kill); in expandLPMWELPMW()
906 .addReg(AVR::R0, RegState::Kill); in expandLPMWELPMW()
977 .addReg(AVR::R0, RegState::Kill); in expandLPMBELPMB()
1215 .addReg(DstReg, RegState::Kill) in expand()
1222 .addReg(DstReg, RegState::Kill) in expand()
[all …]
H A DAVRRegisterInfo.cpp223 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
262 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
269 .addReg(STI.getTmpRegister(), RegState::Kill); in eliminateFrameIndex()
274 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp109 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
116 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
122 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
187 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
188 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
194 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
195 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
200 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
201 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp140 S |= RegState::Kill; in getMopState()
341 MachineInstrBuilder Kill; in runOnMachineFunction() local
356 KillOps.emplace_back(R.second.first | RegState::Kill, in runOnMachineFunction()
375 KillOps.emplace_back(R.second.first | RegState::Kill, SubReg); in runOnMachineFunction()
387 Kill = BuildMI(*MI.getParent(), std::next(LastClauseInst), in runOnMachineFunction()
390 Kill.addUse(Reg, std::get<0>(Op), std::get<1>(Op)); in runOnMachineFunction()
391 Ind->insertMachineInstrInMaps(*Kill); in runOnMachineFunction()
397 if (!Kill) in runOnMachineFunction()
H A DSIPostRABundler.cpp196 MachineInstr &Kill = *Next; in runOnMachineFunction() local
197 collectUsedRegUnits(Kill, KillUsedRegUnits); in runOnMachineFunction()
207 Kill.eraseFromParent(); in runOnMachineFunction()
H A DSIOptimizeVGPRLiveRange.cpp586 MachineInstr *Kill = nullptr; in optimizeWaterfallLiveRange() local
591 Kill = MI; in optimizeWaterfallLiveRange()
595 assert(Kill && "Failed to find last usage of register in loop"); in optimizeWaterfallLiveRange()
597 MachineBasicBlock *KillBlock = Kill->getParent(); in optimizeWaterfallLiveRange()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp331 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
348 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
379 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
407 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
423 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
454 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
479 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
484 .addReg(Tmp2Reg, RegState::Kill) in selectI64ImmDirect()
506 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
511 .addReg(Tmp2Reg, RegState::Kill) in selectI64ImmDirect()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h112 SlotIndex Kill; member
118 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
244 SlotIndex Kill = SlotIndex()) {
245 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DLiveInterval.h94 const bool Kill; variable
98 bool Kill) in LiveQueryResult() argument
99 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
113 return Kill; in isKill()
497 SlotIndex StartIdx, SlotIndex Kill);
504 VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
555 bool Kill = false; in Query() local
561 Kill = true; in Query()
563 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
578 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
H A DMachineInstrBuilder.h50 Kill = 0x8, enumerator
66 ImplicitKill = Implicit | Kill
106 flags & RegState::Kill,
556 return B ? RegState::Kill : 0; in getKillRegState()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp647 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
650 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
656 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
660 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
766 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
806 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
831 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
834 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
837 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
843 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.cpp154 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
160 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
172 .addReg(ScratchReg, RegState::Kill) in eliminateFrameIndex()
188 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRangeCalc.cpp72 if (I.Kill.isValid()) in updateFromLiveIns()
74 End = I.Kill; in updateFromLiveIns()
324 LiveIn.back().Kill = Use;
392 // The value may be live-through even if Kill is set, as can happen when in updateSSA()
410 if (I.Kill.isValid()) { in updateSSA()
412 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
423 if (I.Kill.isValid()) in updateSSA()
H A DExecutionDomainFix.cpp235 void ExecutionDomainFix::processDefs(MachineInstr *MI, bool Kill) { in processDefs() argument
251 if (Kill) in processDefs()
404 bool Kill = false; in processBasicBlock() local
406 Kill = visitInstr(&MI); in processBasicBlock()
407 processDefs(&MI, Kill); in processBasicBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp82 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
95 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
102 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
109 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp158 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
161 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
164 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
168 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
184 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
187 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
280 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB); in expandAtomicCmpSwap()
290 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap()
493 .addReg(StoreVal, RegState::Kill) in expandAtomicBinOpSubword()
496 .addReg(StoreVal, RegState::Kill) in expandAtomicBinOpSubword()
[all …]
H A DMips16InstrInfo.cpp290 MIB2.addReg(Mips::SP, RegState::Kill); in adjustStackPtrBig()
293 MIB3.addReg(Reg2, RegState::Kill); in adjustStackPtrBig()
296 MIB4.addReg(Reg1, RegState::Kill); in adjustStackPtrBig()
416 .addReg(SpReg, RegState::Kill) in loadImmediate()
421 .addReg(Reg, RegState::Kill); in loadImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp92 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
458 .addReg(ARM::SP, RegState::Kill) in emitPrologue()
463 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
469 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
474 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
760 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
777 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
818 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
825 .addReg(TemporaryReg, RegState::Kill) in emitPopSpecialFixUp()
944 PushMIB.addReg(Reg, RegState::Kill); in pushRegsToStack()
[all …]
H A DThumbRegisterInfo.cpp173 .addReg(LdReg, RegState::Kill) in emitThumbRegPlusImmInReg()
222 .addReg(CPSRSaveReg, RegState::Kill) in emitThumbRegPlusImmediate()
241 MIB.addReg(BaseReg).addReg(LdReg, RegState::Kill); in emitThumbRegPlusImmediate()
243 MIB.addReg(LdReg).addReg(BaseReg, RegState::Kill); in emitThumbRegPlusImmediate()
380 MIB.addReg(BaseReg, RegState::Kill); in rewriteFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp768 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
776 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
859 .addReg(NegSizeReg1, RegState::Kill); in prepareDynamicAlloca()
876 .addReg(NegSizeReg1, RegState::Kill); in prepareDynamicAlloca()
985 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
992 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
1031 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
1036 .addReg(Reg, RegState::Kill); in lowerCRRestore()
1144 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
1149 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
H A DPPCFrameLowering.cpp798 MIB.addReg(MustSaveCRs[0], RegState::Kill); in emitPrologue()
951 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
957 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
958 .addReg(TempReg, RegState::Kill); in emitPrologue()
962 .addReg(SPReg, RegState::Kill) in emitPrologue()
973 .addReg(SPReg, RegState::Kill) in emitPrologue()
1003 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
1019 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue()
1030 .addReg(PPC::R30, RegState::Kill) // Save PIC base pointer. in emitPrologue()
1041 .addReg(BPReg, RegState::Kill) // Save BP. in emitPrologue()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp97 .addReg(Reg1, RegState::Kill); in adjustStackPtr()
101 .addReg(Reg, RegState::Kill) in adjustStackPtr()
102 .addReg(Reg, RegState::Kill); in adjustStackPtr()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp402 .addUse(TmpReg, RegState::Kill | RegState::Renamable) in insertRegToSPTaintPropagation()
403 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation()
408 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation()
580 .addUse(SrcReg, RegState::Kill) in expandSpeculationSafeValue()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp1153 .addReg(TargetReg, RegState::Kill) in tracePredStateThroughIndirectBranches()
1172 .addReg(TargetReg, RegState::Kill) in tracePredStateThroughIndirectBranches()
1173 .addReg(AddrReg, RegState::Kill); in tracePredStateThroughIndirectBranches()
1531 .addReg(PredStateReg, RegState::Kill) in mergePredStateIntoSP()
1537 .addReg(TmpReg, RegState::Kill); in mergePredStateIntoSP()
1556 .addReg(TmpReg, RegState::Kill) in extractPredStateFromSP()
2163 .addReg(ExpectedRetAddrReg, RegState::Kill) in tracePredStateThroughCall()
2174 .addReg(ExpectedRetAddrReg, RegState::Kill) in tracePredStateThroughCall()
2175 .addReg(ActualRetAddrReg, RegState::Kill); in tracePredStateThroughCall()
2185 .addReg(NewStateReg, RegState::Kill) in tracePredStateThroughCall()

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