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Searched refs:Kill (Results 1 – 25 of 142) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp70 .addReg(STI.getTmpRegister(), RegState::Kill) in emitPrologue()
77 .addReg(STI.getTmpRegister(), RegState::Kill) in emitPrologue()
81 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
85 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
86 .addReg(STI.getZeroRegister(), RegState::Kill) in emitPrologue()
125 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
156 .addReg(STI.getTmpRegister(), RegState::Kill); in restoreStatusRegister()
212 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
220 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
376 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
[all …]
H A DAVRExpandPseudoInsts.cpp467 .addReg(DstHiReg, RegState::Kill); in expand()
718 .addReg(SrcReg, RegState::Kill); in expand()
724 .addReg(SrcReg, RegState::Kill); in expand()
751 .addReg(SrcReg, RegState::Kill); in expand()
757 .addReg(SrcReg, RegState::Kill); in expand()
876 .addReg(AVR::R0, RegState::Kill); in expandLPMWELPMW()
904 .addReg(AVR::R0, RegState::Kill); in expandLPMWELPMW()
975 .addReg(AVR::R0, RegState::Kill); in expandLPMBELPMB()
1213 .addReg(DstReg, RegState::Kill) in expand()
1220 .addReg(DstReg, RegState::Kill) in expand()
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H A DAVRRegisterInfo.cpp218 .addReg(DstReg, RegState::Kill) in eliminateFrameIndex()
257 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
264 .addReg(STI.getTmpRegister(), RegState::Kill); in eliminateFrameIndex()
269 .addReg(AVR::R29R28, RegState::Kill) in eliminateFrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp104 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
111 .addReg(ScratchOffset, RegState::Kill) in InsertFPConstInst()
117 .addReg(ScratchOffset, RegState::Kill); in InsertFPConstInst()
182 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
183 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
189 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
190 .addReg(ScratchOffset, RegState::Kill) in InsertSPConstInst()
195 .addReg(ScratchBase, RegState::Kill) in InsertSPConstInst()
196 .addReg(ScratchOffset, RegState::Kill); in InsertSPConstInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp331 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
348 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
379 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
407 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
423 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
454 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
479 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
484 .addReg(Tmp2Reg, RegState::Kill) in selectI64ImmDirect()
506 .addReg(TmpReg, RegState::Kill) in selectI64ImmDirect()
511 .addReg(Tmp2Reg, RegState::Kill) in selectI64ImmDirect()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveRangeCalc.h113 SlotIndex Kill; member
119 : LR(LR), DomNode(node), Kill(kill) {} in LiveInBlock()
245 SlotIndex Kill = SlotIndex()) {
246 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
H A DLiveInterval.h95 const bool Kill; variable
99 bool Kill) in LiveQueryResult() argument
100 : EarlyVal(EarlyVal), LateVal(LateVal), EndPoint(EndPoint), Kill(Kill) in LiveQueryResult()
114 return Kill; in isKill()
501 SlotIndex Kill);
508 LLVM_ABI VNInfo *extendInBlock(SlotIndex StartIdx, SlotIndex Kill);
558 bool Kill = false; in Query() local
564 Kill = true; in Query()
566 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
581 return LiveQueryResult(EarlyVal, LateVal, EndPoint, Kill); in Query()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp144 S |= RegState::Kill; in getMopState()
342 MachineInstrBuilder Kill; in run() local
357 KillOps.emplace_back(R.second.first | RegState::Kill, in run()
376 KillOps.emplace_back(R.second.first | RegState::Kill, SubReg); in run()
388 Kill = BuildMI(*MI.getParent(), std::next(LastClauseInst), in run()
391 Kill.addUse(Reg, std::get<0>(Op), std::get<1>(Op)); in run()
392 Ind->insertMachineInstrInMaps(*Kill); in run()
398 if (!Kill) in run()
H A DSIPostRABundler.cpp214 MachineInstr &Kill = *Next; in run() local
215 collectUsedRegUnits(Kill, KillUsedRegUnits); in run()
225 Kill.eraseFromParent(); in run()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp641 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
644 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
650 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
654 .addReg(AdrOp.getReg(), RSA & ~RegState::Kill, AdrOp.getSubReg()) in splitMemRef()
760 .addReg(Op1.getReg(), RS & ~RegState::Kill, Op1.getSubReg()); in splitExt()
800 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
825 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
828 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
831 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
837 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRangeCalc.cpp71 if (I.Kill.isValid()) in updateFromLiveIns()
73 End = I.Kill; in updateFromLiveIns()
323 LiveIn.back().Kill = Use; in findReachingDefs()
409 if (I.Kill.isValid()) { in updateSSA()
411 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI)); in updateSSA()
422 if (I.Kill.isValid()) in updateSSA()
H A DExecutionDomainFix.cpp235 void ExecutionDomainFix::processDefs(MachineInstr *MI, bool Kill) { in processDefs() argument
251 if (Kill) in processDefs()
404 bool Kill = false; in processBasicBlock() local
406 Kill = visitInstr(&MI); in processBasicBlock()
407 processDefs(&MI, Kill); in processBasicBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.cpp191 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
197 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
209 .addReg(ScratchReg, RegState::Kill) in eliminateFrameIndex()
225 .addReg(ScratchReg, RegState::Kill); in eliminateFrameIndex()
H A DLoongArchExpandPseudoInsts.cpp288 .addReg(TmpPart0, RegState::Kill); in expandLargeAddressLoad()
290 .addReg(TmpParts02, RegState::Kill); in expandLargeAddressLoad()
293 .addReg(TmpPart1, RegState::Kill); in expandLargeAddressLoad()
385 .addReg(Part1, RegState::Kill) in expandLoadAddressTLSLE()
391 .addReg(Parts01, RegState::Kill) in expandLoadAddressTLSLE()
398 .addReg(Part1, RegState::Kill) in expandLoadAddressTLSLE()
406 .addReg(Parts01, RegState::Kill) in expandLoadAddressTLSLE()
409 .addReg(Parts012, RegState::Kill) in expandLoadAddressTLSLE()
520 .addReg(Tmp2Reg, RegState::Kill) in expandLoadAddressTLSDesc()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp83 .addReg(ScratchReg, RegState::Kill).addReg(DstReg) in expandMEMCPY()
96 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
103 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
110 .addReg(ScratchReg, RegState::Kill).addReg(DstReg).addImm(Offset); in expandMEMCPY()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp771 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
779 .addReg(Reg, RegState::Kill) in lowerDynamicAlloc()
862 .addReg(NegSizeReg1, RegState::Kill); in prepareDynamicAlloca()
879 .addReg(NegSizeReg1, RegState::Kill); in prepareDynamicAlloca()
988 .addReg(Reg1, RegState::Kill) in lowerCRSpilling()
995 .addReg(Reg, RegState::Kill), in lowerCRSpilling()
1034 .addReg(Reg1, RegState::Kill).addImm(32-ShiftBits).addImm(0) in lowerCRRestore()
1039 .addReg(Reg, RegState::Kill); in lowerCRRestore()
1152 .addReg(Reg1, RegState::Kill) in lowerCRBitSpilling()
1157 .addReg(Reg, RegState::Kill), in lowerCRBitSpilling()
[all …]
H A DPPCFrameLowering.cpp798 MIB.addReg(MustSaveCRs[0], RegState::Kill); in emitPrologue()
953 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
959 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
960 .addReg(TempReg, RegState::Kill); in emitPrologue()
964 .addReg(SPReg, RegState::Kill) in emitPrologue()
975 .addReg(SPReg, RegState::Kill) in emitPrologue()
1005 .addReg(ScratchReg, RegState::Kill) in emitPrologue()
1021 .addReg(FPReg, RegState::Kill) // Save FP. in emitPrologue()
1032 .addReg(PPC::R30, RegState::Kill) // Save PIC base pointer. in emitPrologue()
1043 .addReg(BPReg, RegState::Kill) // Save BP. in emitPrologue()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1FrameLowering.cpp90 .addReg(ScratchReg, RegState::Kill) in emitPrologueEpilogueSPUpdate()
430 .addReg(ARM::SP, RegState::Kill) in emitPrologue()
435 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
441 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
446 .addReg(ARM::R4, RegState::Kill) in emitPrologue()
731 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
748 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
789 .addReg(PopReg, RegState::Kill) in emitPopSpecialFixUp()
796 .addReg(TemporaryReg, RegState::Kill) in emitPopSpecialFixUp()
918 PushMIB.addReg(Reg, RegState::Kill); in pushRegsToStack()
[all …]
H A DThumbRegisterInfo.cpp171 .addReg(LdReg, RegState::Kill) in emitThumbRegPlusImmInReg()
220 .addReg(CPSRSaveReg, RegState::Kill) in emitThumbRegPlusImmInReg()
239 MIB.addReg(BaseReg).addReg(LdReg, RegState::Kill); in emitThumbRegPlusImmInReg()
241 MIB.addReg(LdReg).addReg(BaseReg, RegState::Kill); in emitThumbRegPlusImmInReg()
378 MIB.addReg(BaseReg, RegState::Kill); in emitThumbRegPlusImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp157 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
160 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
163 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
167 .addReg(Scratch, RegState::Kill) in expandAtomicCmpSwapSubword()
183 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
186 .addReg(Dest, RegState::Kill) in expandAtomicCmpSwapSubword()
279 .addReg(Dest, RegState::Kill).addReg(OldVal).addMBB(exitMBB); in expandAtomicCmpSwap()
289 .addReg(Scratch, RegState::Kill).addReg(ZERO).addMBB(loop1MBB); in expandAtomicCmpSwap()
513 .addReg(StoreVal, RegState::Kill) in expandAtomicBinOpSubword()
516 .addReg(StoreVal, RegState::Kill) in expandAtomicBinOpSubword()
[all …]
H A DMips16InstrInfo.cpp287 MIB2.addReg(Mips::SP, RegState::Kill); in adjustStackPtrBig()
290 MIB3.addReg(Reg2, RegState::Kill); in adjustStackPtrBig()
293 MIB4.addReg(Reg1, RegState::Kill); in adjustStackPtrBig()
413 .addReg(SpReg, RegState::Kill) in loadImmediate()
418 .addReg(Reg, RegState::Kill); in loadImmediate()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp397 .addUse(TmpReg, RegState::Kill | RegState::Renamable) in insertRegToSPTaintPropagation()
398 .addUse(MisspeculatingTaintReg, RegState::Kill) in insertRegToSPTaintPropagation()
403 .addUse(TmpReg, RegState::Kill) in insertRegToSPTaintPropagation()
575 .addUse(SrcReg, RegState::Kill) in expandSpeculationSafeValue()
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/gdb-remote/
H A DGDBRemoteCommunicationServerPlatform.cpp195 Host::Kill(debugserver_pid, SIGINT); in Handle_qLaunchGDBServer()
267 Host::Kill(pid, SIGTERM); in KillSpawnedProcess()
283 Host::Kill(pid, SIGKILL); in KillSpawnedProcess()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeLoadHardening.cpp1150 .addReg(TargetReg, RegState::Kill) in tracePredStateThroughIndirectBranches()
1169 .addReg(TargetReg, RegState::Kill) in tracePredStateThroughIndirectBranches()
1170 .addReg(AddrReg, RegState::Kill); in tracePredStateThroughIndirectBranches()
1528 .addReg(PredStateReg, RegState::Kill) in mergePredStateIntoSP()
1534 .addReg(TmpReg, RegState::Kill); in mergePredStateIntoSP()
1553 .addReg(TmpReg, RegState::Kill) in extractPredStateFromSP()
2160 .addReg(ExpectedRetAddrReg, RegState::Kill) in tracePredStateThroughCall()
2171 .addReg(ExpectedRetAddrReg, RegState::Kill) in tracePredStateThroughCall()
2172 .addReg(ActualRetAddrReg, RegState::Kill); in tracePredStateThroughCall()
2182 .addReg(NewStateReg, RegState::Kill) in tracePredStateThroughCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp100 .addReg(Reg1, RegState::Kill); in adjustStackPtr()
104 BuildMI(MBB, I, DL, get(Xtensa::MOVSP), SP).addReg(Reg, RegState::Kill); in adjustStackPtr()
107 .addReg(Reg, RegState::Kill) in adjustStackPtr()
108 .addReg(Reg, RegState::Kill); in adjustStackPtr()
508 BuildMI(MBB, II, DL, get(Xtensa::JX)).addReg(ScratchReg, RegState::Kill); in insertIndirectBranch()

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