| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankCombiner.cpp | 83 Register &Val, CstTy &K0, CstTy &K1) const;
98 bool isClampZeroToOne(MachineInstr *K0, MachineInstr *K1) const;
174 CstTy &K0, CstTy &K1) const { in matchMed()
186 m_Cst(K1)), in matchMed()
188 MMMOpc.Max, m_CommutativeBinOp(MMMOpc.Min, m_Reg(Val), m_Cst(K1)), in matchMed()
205 std::optional<ValueAndVReg> K0, K1; in matchIntMinMaxToMed3() local
207 if (!matchMed<GCstAndRegMatch>(MI, MRI, OpcodeTriple, Val, K0, K1)) in matchIntMinMaxToMed3()
210 if (OpcodeTriple.Med == AMDGPU::G_AMDGPU_SMED3 && K0->Value.sgt(K1->Value)) in matchIntMinMaxToMed3()
212 if (OpcodeTriple.Med == AMDGPU::G_AMDGPU_UMED3 && K0->Value.ugt(K1->Value)) in matchIntMinMaxToMed3()
215 MatchInfo = {OpcodeTriple.Med, Val, K0->VReg, K1->VReg}; in matchIntMinMaxToMed3()
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| H A D | AMDGPUISelLowering.cpp | 2932 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT); in lowerFEXP10Unsafe() local
2936 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, X, K1, Flags); in lowerFEXP10Unsafe()
2958 SDValue K1 = DAG.getConstantFP(0x1.4f0978p-11f, SL, VT); in lowerFEXP10Unsafe() local
2962 SDValue Mul1 = DAG.getNode(ISD::FMUL, SL, VT, AdjustedX, K1, Flags); in lowerFEXP10Unsafe()
3478 SDValue K0, K1; in LowerFP_TO_INT64() local
3483 K1 = DAG.getConstantFP( in LowerFP_TO_INT64()
3489 K1 = DAG.getConstantFP( in LowerFP_TO_INT64()
3497 SDValue Fma = DAG.getNode(ISD::FMA, SL, SrcVT, FloorMul, K1, Trunc); in LowerFP_TO_INT64()
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| H A D | SIISelLowering.cpp | 10601 const SDValue K1 = DAG.getConstantFP(K1Val, SL, MVT::f32); in lowerFDIV_FAST() local
10610 SDValue r3 = DAG.getNode(ISD::SELECT, SL, MVT::f32, r2, K1, One, Flags); in lowerFDIV_FAST()
13100 ConstantFPSDNode *K1 = getSplatConstantFP(Op1); in performFPMed3ImmCombine() local
13101 if (!K1) in performFPMed3ImmCombine()
13109 if (K0->getValueAPF() > K1->getValueAPF()) in performFPMed3ImmCombine()
13121 if (K1->isExactlyValue(1.0) && K0->isExactlyValue(0.0)) in performFPMed3ImmCombine()
13138 (!K1->hasOneUse() || TII->isInlineConstant(K1->getValueAPF()))) { in performFPMed3ImmCombine()
13140 Var, SDValue(K0, 0), SDValue(K1, 0)); in performFPMed3ImmCombine()
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| /freebsd/contrib/llvm-project/clang/include/clang/Lex/ |
| H A D | DependencyDirectivesScanner.h | 49 bool isOneOf(tok::TokenKind K1, tok::TokenKind K2) const { in isOneOf()
50 return is(K1) || is(K2); in isOneOf()
52 template <typename... Ts> bool isOneOf(tok::TokenKind K1, Ts... Ks) const { in isOneOf()
53 return is(K1) || isOneOf(Ks...); in isOneOf()
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| H A D | Token.h | 101 bool isOneOf(tok::TokenKind K1, tok::TokenKind K2) const { in isOneOf() argument
102 return is(K1) || is(K2); in isOneOf()
104 template <typename... Ts> bool isOneOf(tok::TokenKind K1, Ts... Ks) const { in isOneOf() argument
105 return is(K1) || isOneOf(Ks...); in isOneOf()
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| /freebsd/sys/opencrypto/ |
| H A D | rmd160.c | 60 #define K1 0x5A827999U macro
196 R(e, a, b, c, d, F1, K1, 7, 7); in RMD160Transform()
197 R(d, e, a, b, c, F1, K1, 6, 4); in RMD160Transform()
198 R(c, d, e, a, b, F1, K1, 8, 13); in RMD160Transform()
199 R(b, c, d, e, a, F1, K1, 13, 1); in RMD160Transform()
200 R(a, b, c, d, e, F1, K1, 11, 10); in RMD160Transform()
201 R(e, a, b, c, d, F1, K1, 9, 6); in RMD160Transform()
202 R(d, e, a, b, c, F1, K1, 7, 15); in RMD160Transform()
203 R(c, d, e, a, b, F1, K1, 15, 3); in RMD160Transform()
204 R(b, c, d, e, a, F1, K1, 7, 12); in RMD160Transform()
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| /freebsd/contrib/bearssl/src/hash/ |
| H A D | sha1.c | 34 #define K1 ((uint32_t)0x5A827999) macro
64 e += ROTL(a, 5) + F(b, c, d) + K1 + m[i + 0]; b = ROTL(b, 30); in br_sha1_round()
65 d += ROTL(e, 5) + F(a, b, c) + K1 + m[i + 1]; a = ROTL(a, 30); in br_sha1_round()
66 c += ROTL(d, 5) + F(e, a, b) + K1 + m[i + 2]; e = ROTL(e, 30); in br_sha1_round()
67 b += ROTL(c, 5) + F(d, e, a) + K1 + m[i + 3]; d = ROTL(d, 30); in br_sha1_round()
68 a += ROTL(b, 5) + F(c, d, e) + K1 + m[i + 4]; c = ROTL(c, 30); in br_sha1_round()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 611 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K1) in emitInterruptPrologueStub()
616 STI.getInstrInfo()->storeRegToStack(MBB, MBBI, Mips::K1, false, in emitInterruptPrologueStub()
622 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::MFC0), Mips::K1) in emitInterruptPrologueStub()
627 STI.getInstrInfo()->storeRegToStack(MBB, MBBI, Mips::K1, false, in emitInterruptPrologueStub()
656 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
660 .addReg(Mips::K1) in emitInterruptPrologueStub()
664 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
668 .addReg(Mips::K1) in emitInterruptPrologueStub()
673 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
677 .addReg(Mips::K1) in emitInterruptPrologueStub()
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| H A D | MipsRegisterInfo.td | 115 def K1 : MipsGPRReg< 27, "27">, DwarfRegNum<[27]>;
150 def K1_64 : Mips64GPRReg< 27, "27", [K1]>, DwarfRegNum<[27]>;
296 K0, K1, GP, SP, FP, RA)>;
316 K0, K1, GP, SP, FP, RA)>;
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| H A D | MipsRegisterInfo.cpp | 152 Mips::ZERO, Mips::K0, Mips::K1, Mips::SP in getReservedRegs()
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| H A D | MicroMipsSizeReduction.cpp | 383 Mips::S6, Mips::S7, Mips::T8, Mips::T9, Mips::K0, Mips::K1, Mips::GP, in ConsecutiveRegisters()
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| /freebsd/contrib/llvm-project/clang/lib/Format/ |
| H A D | FormatToken.h | 622 template <typename A, typename B> bool isOneOf(A K1, B K2) const { in isOneOf()
623 return is(K1) || is(K2); in isOneOf()
626 bool isOneOf(A K1, B K2, Ts... Ks) const { in isOneOf()
627 return is(K1) || isOneOf(K2, Ks...); in isOneOf()
647 bool startsSequence(A K1, Ts... Tokens) const { in startsSequence()
648 return startsSequenceInternal(K1, Tokens...); in startsSequence()
658 bool endsSequence(A K1, Ts... Tokens) const { in endsSequence()
659 return endsSequenceInternal(K1, Tokens...); in endsSequence()
903 bool startsSequenceInternal(A K1, Ts... Tokens) const { in startsSequenceInternal()
905 return Next->startsSequenceInternal(K1, Tokens...); in startsSequenceInternal()
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| /freebsd/contrib/llvm-project/lldb/source/Target/ |
| H A D | Trace.cpp | 69 template <typename K1, typename K2, typename V>
70 static std::optional<V> Lookup(DenseMap<K1, DenseMap<K2, V>> &map, K1 k1, in Lookup() argument
79 template <typename K1, typename K2, typename V>
80 static V *LookupAsPtr(DenseMap<K1, DenseMap<K2, V>> &map, K1 k1, K2 k2) { in LookupAsPtr() argument
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| /freebsd/crypto/openssl/test/ |
| H A D | modes_internal_test.c | 272 static const u8 K1[16], P1[] = { 0 }, A1[] = { 0 }, IV1[12], C1[] = { 0 }; variable
279 # define K2 K1
726 # define K19 K1
755 # define K20 K1
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| /freebsd/sys/contrib/device-tree/src/arm/xilinx/ |
| H A D | zynq-zturn-common.dtsi | 53 label = "K1";
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| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | s3c6410-mini6410.dts | 68 label = "K1";
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| /freebsd/contrib/llvm-project/llvm/lib/Support/ |
| H A D | xxhash.cpp | 142 uint64_t const K1 = round(0, endian::read64le(P)); in xxHash64() local
143 H64 ^= K1; in xxHash64()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 469 ENTRY(K1) \
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.td | 408 def K1 : X86Reg<"k1", 1>, DwarfRegNum<[119, 94, 94]>;
417 [(add K0, K2, K4, K6), (add K1, K3, K5, K7)]>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86Operand.h | 606 case X86::K1: in addMaskPairOperands()
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | sysex | 223 >>3 byte 0x20 K1
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| /freebsd/contrib/sendmail/contrib/ |
| H A D | mail.local.linux | 153 M+KM_<T`?@K/GU!`YD]7Z`F1`4K1#[4`,2=-%!!9TK/O%0T)'!;BA-TP`%]$R
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 361 {codeview::RegisterId::AMD64_K1, X86::K1}, in initLLVMToSEHAndCVRegMapping()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 1350 unsigned K1 = getKillRegState(Op1.isKill()); in expandPostRAPseudo() local
1355 .addReg(Pu, (Rd == Rt) ? K1 : 0) in expandPostRAPseudo()
1359 .addReg(Pu, K1) in expandPostRAPseudo()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
| H A D | Combine.td | 573 // binop (select cond, K0, K1), K2 ->
574 // select cond, (binop K0, K2), (binop K1, K2)
|