Searched refs:IsRegCall (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | X86.cpp | 749 bool IsRegCall = State.CC == llvm::CallingConv::X86_RegCall; in classifyArgumentType() local 777 if ((IsRegCall || IsVectorCall) && in classifyArgumentType() 852 IsFastCall || IsVectorCall || IsRegCall, PaddingType); in classifyArgumentType() 1273 bool isNamedArg, bool IsRegCall = false) const; 1299 bool IsRegCall = false) const; 1414 bool IsVectorCall, bool IsRegCall) const; 1800 Class &Hi, bool isNamedArg, bool IsRegCall) const { in classify() 2004 if (!IsRegCall && Size > 512) in classify() 2726 bool isNamedArg, bool IsRegCall) const { in classifyArgumentType() 2730 classify(Ty, 0, Lo, Hi, isNamedArg, IsRegCall); in classifyArgumentType() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 647 bool IsRegCall = false; in LowerCall() local 656 IsRegCall = true; in LowerCall() 668 IsRegCall = true; in LowerCall() 677 IsRegCall = true; in LowerCall() 703 return DAG.getNode(IsRegCall ? CSKYISD::TAILReg : CSKYISD::TAIL, DL, in LowerCall() 707 Chain = DAG.getNode(IsRegCall ? CSKYISD::CALLReg : CSKYISD::CALL, DL, NodeTys, in LowerCall()
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| /freebsd/contrib/llvm-project/clang/lib/AST/ |
| H A D | ItaniumMangle.cpp | 1556 bool IsRegCall = FD && in mangleUnqualifiedName() local 1570 else if (IsRegCall) in mangleUnqualifiedName()
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