| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelDAGToDAG.cpp | 354 APInt ImmValue; in selectVSplatImm() local 360 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatImm() 361 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatImm() 362 if (IsSigned && ImmValue.isSignedIntN(ImmBitSize)) { in selectVSplatImm() 363 SplatVal = CurDAG->getTargetConstant(ImmValue.getSExtValue(), SDLoc(N), in selectVSplatImm() 367 if (!IsSigned && ImmValue.isIntN(ImmBitSize)) { in selectVSplatImm() 368 SplatVal = CurDAG->getTargetConstant(ImmValue.getZExtValue(), SDLoc(N), in selectVSplatImm() 379 APInt ImmValue; in selectVSplatUimmInvPow2() local 385 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmInvPow2() 386 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmInvPow2() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSplitConst32AndConst64.cpp | 78 uint64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 81 .addImm(ImmValue); in runOnMachineFunction() 85 int64_t ImmValue = MI.getOperand(1).getImm(); in runOnMachineFunction() local 90 int32_t LowWord = (ImmValue & 0xFFFFFFFF); in runOnMachineFunction() 91 int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF; in runOnMachineFunction()
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| H A D | HexagonHardwareLoops.cpp | 659 int64_t Mask = 0, ImmValue = 0; in getLoopTripCount() local 661 TII->analyzeCompare(*CondI, CmpReg1, CmpReg2, Mask, ImmValue); in getLoopTripCount()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 553 APInt ImmValue; in selectVSplatCommon() local 559 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatCommon() 560 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatCommon() 562 if (( Signed && ImmValue.isSignedIntN(ImmBitSize)) || in selectVSplatCommon() 563 (!Signed && ImmValue.isIntN(ImmBitSize))) { in selectVSplatCommon() 564 Imm = CurDAG->getTargetConstant(ImmValue, SDLoc(N), EltTy); in selectVSplatCommon() 629 APInt ImmValue; in selectVSplatUimmPow2() local 635 if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) && in selectVSplatUimmPow2() 636 ImmValue.getBitWidth() == EltTy.getSizeInBits()) { in selectVSplatUimmPow2() 637 int32_t Log2 = ImmValue.exactLogBase2(); in selectVSplatUimmPow2() [all …]
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| H A D | MicroMipsSizeReduction.cpp | 528 int64_t ImmValue; in ReduceADDIUToADDIUSP() local 529 if (!GetImm(MI, Entry.ImmField(), ImmValue)) in ReduceADDIUToADDIUSP() 532 if (!AddiuspImmValue(ImmValue)) in ReduceADDIUToADDIUSP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 228 bool loadImmediate(int64_t ImmValue, unsigned DstReg, unsigned SrcReg, 2620 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2621 if (isInt<16>(ImmValue)) in tryExpandInstruction() 2632 int64_t ImmValue = Inst.getOperand(2).getImm(); in tryExpandInstruction() local 2633 if (isUInt<16>(ImmValue)) in tryExpandInstruction() 2759 bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg, in loadImmediate() argument 2771 if (isInt<32>(ImmValue) || isUInt<32>(ImmValue)) { in loadImmediate() 2775 ImmValue = SignExtend64<32>(ImmValue); in loadImmediate() 2800 if (isInt<16>(ImmValue)) { in loadImmediate() 2808 TOut.emitRRI(Mips::DADDiu, DstReg, SrcReg, ImmValue, IDLoc, STI); in loadImmediate() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 665 int32_t ImmValue = RawImmValue; in expandSET() local 670 IsImm && ((is64Bit() ? 0 : -4096) <= ImmValue && ImmValue < 4096); in expandSET() 673 ValExpr = MCConstantExpr::create(ImmValue, getContext()); in expandSET() 703 if (!IsImm || IsEffectivelyImm13 || (ImmValue & 0x3ff)) { in expandSET() 730 int64_t ImmValue = IsImm ? MCValOp.getImm() : 0; in expandSETX() local 732 const MCExpr *ValExpr = IsImm ? MCConstantExpr::create(ImmValue, getContext()) in expandSETX() 736 if (IsImm && isInt<13>(ImmValue)) { in expandSETX() 761 if (IsImm && isUInt<32>(ImmValue)) in expandSETX()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 364 uint16_t ImmValue; member 366 : SysAlias(N, E), ImmValue(I) {} in SysAliasImm() 368 : SysAlias(N, E, F), ImmValue(I) {} in SysAliasImm()
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| /freebsd/contrib/llvm-project/llvm/lib/Object/ |
| H A D | MachOObjectFile.cpp | 3518 uint8_t ImmValue = Byte & MachO::REBASE_IMMEDIATE_MASK; in moveNext() local 3530 RebaseType = ImmValue; in moveNext() 3544 SegmentIndex = ImmValue; in moveNext() 3593 SegmentOffset += ImmValue * PointerSize; in moveNext() 3611 Count = ImmValue; in moveNext() 3612 if (ImmValue != 0) in moveNext() 3613 RemainingLoopCount = ImmValue - 1; in moveNext() 3857 uint8_t ImmValue = Byte & MachO::BIND_IMMEDIATE_MASK; in moveNext() local 3889 Ordinal = ImmValue; in moveNext() 3891 if (ImmValue > O->getLibraryCount()) { in moveNext() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 207 unsigned SrcReg2, int64_t ImmValue, in isRedundantFlagInstr() argument 222 OI->getOperand(2).getImm() == ImmValue) in isRedundantFlagInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 715 Register SrcReg2, int64_t ImmMask, int64_t ImmValue,
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| H A D | X86InstrInfo.cpp | 4843 int64_t ImmMask, int64_t ImmValue, in isRedundantFlagInstr() argument 4860 OIMask != ImmMask || OIValue != ImmValue) in isRedundantFlagInstr() 4891 if (OIValue == ImmValue) { in isRedundantFlagInstr() 4894 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr() 4898 } else if (static_cast<uint64_t>(ImmValue) == in isRedundantFlagInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 2026 uint64_t ImmValue = 0; in FoldOperand() local 2038 ImmValue = FPC->getValueAPF().bitcastToAPInt().getZExtValue(); in FoldOperand() 2047 ImmValue = Value; in FoldOperand() 2060 Imm = DAG.getTargetConstant(ImmValue, SDLoc(ParentNode), MVT::i32); in FoldOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 2594 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_WB() local 2595 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate offset in SelectMVE_WB() 2629 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_LongShift() local 2630 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_LongShift() 2692 int32_t ImmValue = N->getConstantOperandVal(3); in SelectMVE_VSHLC() local 2693 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_VSHLC() 2879 int ImmValue = ImmOp->getAsZExtVal(); in SelectMVE_VxDUP() local 2880 Ops.push_back(getI32Imm(ImmValue, Loc)); in SelectMVE_VxDUP()
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| H A D | ARMBaseInstrInfo.cpp | 2861 int64_t ImmValue, in isRedundantFlagInstr() argument 2886 OI->getOperand(2).getImm() == ImmValue) { in isRedundantFlagInstr() 2894 OI->getOperand(3).getImm() == ImmValue) { in isRedundantFlagInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 107 let SearchableFields = ["Name", "Encoding", "ImmValue"]; 112 bits<5> ImmValue = immValue;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 10731 int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue(); in lowerVECTOR_SPLICE() 10733 if (ImmValue >= 0) { in lowerVECTOR_SPLICE() 10736 DownOffset = DAG.getConstant(ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE() 10741 UpOffset = DAG.getConstant(-ImmValue, DL, XLenVT); in lowerVECTOR_SPLICE() 11588 int64_t ImmValue = cast<ConstantSDNode>(Offset)->getSExtValue(); in lowerVPSpliceExperimental() 11590 if (ImmValue >= 0) { in lowerVPSpliceExperimental() 11593 DownOffset = DAG.getConstant(ImmValue, DL, XLenVT); in lowerVPSpliceExperimental() 11598 UpOffset = DAG.getConstant(-ImmValue, DL, XLenVT); in lowerVPSpliceExperimental() 10729 int64_t ImmValue = cast<ConstantSDNode>(Op.getOperand(2))->getSExtValue(); lowerVECTOR_SPLICE() local 11586 int64_t ImmValue = cast<ConstantSDNode>(Offset)->getSExtValue(); lowerVPSpliceExperimental() local
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