Searched refs:ImmType (Results 1 – 9 of 9) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrFormats.td | 83 // ImmType - This specifies the immediate type used by an instruction. This is 86 class ImmType<bits<4> val> { 89 def NoImm : ImmType<0>; 90 def Imm8 : ImmType<1>; 91 def Imm8PCRel : ImmType<2>; 92 def Imm8Reg : ImmType<3>; // Register encoded in [7:4]. 93 def Imm16 : ImmType<4>; 94 def Imm16PCRel : ImmType<5>; 95 def Imm32 : ImmType<6>; 96 def Imm32PCRel : ImmType<7>; [all …]
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| H A D | X86InstrUtils.td | 69 ImmType ImmT = Imm8; 73 ImmType ImmT = Imm8; 77 ImmType ImmT = Imm8; 81 ImmType ImmT = Imm8; 85 ImmType ImmT = Imm8; 133 PatFrag loadnode, X86MemOperand memoperand, ImmType immkind, 161 ImmType ImmEncoding = immkind; 812 ImmType ImmT = Imm8;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYInstrFormats.td | 79 class I_16_ZX<string op, ImmLeaf ImmType, list<dag> pattern> 81 (outs GPR:$rz), (ins GPR:$rx,ImmType:$imm16), 93 class I_16_MOV<bits<5> sop, string op, ImmLeaf ImmType> 94 : CSKY32Inst<AddrModeNone, 0x3a, (outs GPR:$rz), (ins ImmType:$imm16), 96 [(set GPR:$rz, ImmType:$imm16)]> { 197 class I_12<bits<4> sop, string op, SDNode node, ImmLeaf ImmType> 199 (ins GPR:$rx, ImmType:$imm12), !strconcat(op, "\t$rz, $rx, $imm12"), 200 [(set GPR:$rz, (node GPR:$rx, ImmType:$imm12))]> { 264 class I_5_ZX<bits<6> sop, bits<5> pcode, string op, ImmLeaf ImmType, 267 (ins CARRY:$cond, GPR:$false, GPR:$rx, ImmType:$imm5), [all …]
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 374 MVT ImmType);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoVPseudos.td | 2286 multiclass VPseudoBinaryV_VI<Operand ImmType, LMULInfo m, string Constraint = ""> { 2287 defm _VI : VPseudoBinary<m.vrclass, m.vrclass, ImmType, m, Constraint>; 2290 multiclass VPseudoBinaryV_VI_RM<Operand ImmType, LMULInfo m, string Constraint = ""> { 2291 defm _VI : VPseudoBinaryRoundingMode<m.vrclass, m.vrclass, ImmType, m, Constraint>; 2327 multiclass VPseudoBinaryW_VI<Operand ImmType, LMULInfo m> { 2328 defm "_VI" : VPseudoBinary<m.wvrclass, m.vrclass, ImmType, m, 5390 list<VTypeInfo> vtilist, Operand ImmType = simm5> 5393 VPatBinaryV_VI<intrinsic, instruction, vtilist, ImmType>; 5396 list<VTypeInfo> vtilist, Operand ImmType> 5399 VPatBinaryV_VI_RM<intrinsic, instruction, vtilist, ImmType>; [all …]
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| H A D | RISCVInstrInfoVSDPatterns.td | 143 Operand ImmType = simm5> 150 !cast<ComplexPattern>(SplatPat#_#ImmType), 151 ImmType>;
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| H A D | RISCVInstrInfo.td | 1358 class PatGprImm<SDPatternOperator OpNode, RVInst Inst, ImmLeaf ImmType, 1360 : Pat<(vt (OpNode (vt GPR:$rs1), ImmType:$imm)), 1361 (Inst GPR:$rs1, ImmType:$imm)>;
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| H A D | RISCVInstrInfoVVLPatterns.td | 960 Operand ImmType = simm5> 967 !cast<ComplexPattern>(SplatPat#_#ImmType), 968 ImmType>;
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 1931 uint64_t Imm, MVT ImmType) { in fastEmit_ri_() argument 1952 Register MaterialReg = fastEmit_i(ImmType, ImmType, ISD::Constant, Imm); in fastEmit_ri_()
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