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Searched refs:ImmOp (Results 1 – 25 of 49) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp109 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
111 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
113 const MachineOperand &ImmOp, unsigned ImmOpNum);
494 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
503 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
561 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
580 MIB.add(ImmOp); in changeLoad()
589 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
590 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
592 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
[all …]
H A DHexagonConstExtenders.cpp1783 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1784 assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi && in replaceInstrExpr()
1900 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
1901 ImmOp.setImm(ImmOp.getImm() + Diff); in replaceInstr()
H A DHexagonAsmPrinter.cpp256 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
257 const auto *HE = static_cast<const HexagonMCExpr*>(ImmOp.getExpr()); in ScaleVectorOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp483 MachineOperand &ImmOp = Lo.getOperand(2); in foldIntoMemoryOps() local
492 ImmOp.setOffset(NewOffset); in foldIntoMemoryOps()
502 switch (ImmOp.getType()) { in foldIntoMemoryOps()
504 MO.ChangeToGA(ImmOp.getGlobal(), ImmOp.getOffset(), in foldIntoMemoryOps()
505 ImmOp.getTargetFlags()); in foldIntoMemoryOps()
508 MO.ChangeToMCSymbol(ImmOp.getMCSymbol(), ImmOp.getTargetFlags()); in foldIntoMemoryOps()
509 MO.setOffset(ImmOp.getOffset()); in foldIntoMemoryOps()
512 MO.ChangeToBA(ImmOp.getBlockAddress(), ImmOp.getOffset(), in foldIntoMemoryOps()
513 ImmOp.getTargetFlags()); in foldIntoMemoryOps()
522 UseMI.addOperand(ImmOp); in foldIntoMemoryOps()
H A DRISCVInstrInfoZb.td214 const MachineOperand &ImmOp = *Operands[1];
218 if (ImmOp.isReg() && ImmOp.getReg())
219 if (auto Val = getIConstantVRegValWithLookThrough(ImmOp.getReg(), MRI)) {
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrPatternsVec.td43 multiclass vbrd_elem32<ValueType v32, ValueType s32, SDPatternOperator ImmOp,
46 def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
55 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
57 def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
100 SDPatternOperator ImmOp, SDNodeXForm ImmCast,
102 defm : vbrd_elem32<v32, s32, ImmOp, ImmCast, SuperRegCast>;
107 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
108 defm : vbrd_elem64<v64, s64, ImmOp, ImmCast>;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallFrameOptimization.cpp291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
292 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
298 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
H A DX86ExpandPseudo.cpp646 const MachineOperand &ImmOp = in expandMI() local
649 if (ImmOp.isImm() && isInt<8>(ImmOp.getImm())) in expandMI()
694 .add(ImmOp); in expandMI()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp156 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
157 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineDebugify.cpp144 auto ImmOp = MachineOperand::CreateImm(NextImm++); in applyDebugifyMetadataToMachineFunction() local
146 /*IsIndirect=*/false, ImmOp, LocalVar, Expr); in applyDebugifyMetadataToMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumbRegisterInfo.cpp460 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in resolveFrameIndex()
478 ImmOp.ChangeToImmediate(ImmedOffset); in eliminateFrameIndex()
514 ImmOp.ChangeToImmediate(InstrOffs); in eliminateFrameIndex()
396 MachineOperand &ImmOp = MI.getOperand(ImmIdx); rewriteFrameIndex() local
H A DARMBaseInstrInfo.h894 unsigned ImmOp; in getAddSubImmediate() local
897 ImmOp = 2; in getAddSubImmediate()
901 ImmOp = 2; in getAddSubImmediate()
906 ImmOp = 3; in getAddSubImmediate()
912 return Scale * MI.getOperand(ImmOp).getImm(); in getAddSubImmediate()
H A DThumb2InstrInfo.cpp734 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
760 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
778 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp253 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
254 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
293 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp92 struct ImmOp { struct
100 ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp1097 MachineOperand ImmOp = MachineOperand::CreateImm(Imm.getSExtValue()); in foldOperand() local
1098 tryAddToFoldList(FoldList, UseMI, UseOpIdx, &ImmOp); in foldOperand()
1678 const MachineOperand *ImmOp = nullptr; in isOMod() local
1682 ImmOp = Src0; in isOMod()
1685 ImmOp = Src1; in isOMod()
1690 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
H A DSIFixSGPRCopies.cpp354 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
356 if (!ImmOp->isImm()) in isSafeToFoldImmIntoCopy()
373 Imm = ImmOp->getImm(); in isSafeToFoldImmIntoCopy()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/
H A DXtensaAsmParser.cpp115 struct ImmOp { struct
123 ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h57 struct ImmOp { struct
85 struct ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td1146 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1150 dag InOperandList = (ins ROWS:$ws, ImmOp:$m);
1174 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1177 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1180 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1183 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1197 ValueType VecTy, Operand ImmOp, ImmLeaf Imm,
1201 dag InOperandList = (ins ROWS:$ws, ImmOp:$n);
1209 Operand ImmOp, ImmLeaf Imm,
1212 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
[all …]
H A DMipsDSPInstrInfo.td334 Operand ImmOp, ImmLeaf immPat, InstrItinClass itin,
337 dag InOperandList = (ins ImmOp:$imm);
389 Operand ImmOp, SDPatternOperator Imm,
392 dag InOperandList = (ins GPR32Opnd:$rs, ImmOp:$sa, GPR32Opnd:$src);
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVLegalizerInfo.cpp805 const MachineOperand &ImmOp = MI.getOperand(2); in legalizeCustom() local
810 APInt GFpClassImm(10, static_cast<uint64_t>(ImmOp.getImm())); in legalizeCustom()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h691 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { in buildSExtInReg() argument
692 return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)}); in buildSExtInReg()
798 int64_t ImmOp);
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp124 struct ImmOp { struct
138 struct ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/
H A DCSKYAsmParser.cpp160 struct ImmOp { struct
188 ImmOp Imm;

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