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Searched refs:ImmOp (Results 1 – 25 of 49) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchMergeBaseOffset.cpp365 MachineOperand ImmOp = Curr->getOperand(2); in foldLargeOffset() local
366 if (ImmOp.getTargetFlags() != LoongArchII::MO_None) in foldLargeOffset()
368 Offset += ImmOp.getImm(); in foldLargeOffset()
374 MachineOperand ImmOp = Curr->getOperand(1); in foldLargeOffset() local
375 if (ImmOp.getTargetFlags() != LoongArchII::MO_None) in foldLargeOffset()
377 Offset += SignExtend64<32>(ImmOp.getImm() << 12) & Mask; in foldLargeOffset()
383 MachineOperand ImmOp = Curr->getOperand(2); in foldLargeOffset() local
384 if (ImmOp.getTargetFlags() != LoongArchII::MO_None || !Lo20) in foldLargeOffset()
386 Offset += SignExtend64<52>(ImmOp.getImm() << 32) & Mask; in foldLargeOffset()
393 MachineOperand ImmOp = Curr->getOperand(2); in foldLargeOffset() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp505 MachineOperand &ImmOp = Lo.getOperand(2); in foldIntoMemoryOps() local
514 ImmOp.setOffset(NewOffset); in foldIntoMemoryOps()
524 switch (ImmOp.getType()) { in foldIntoMemoryOps()
526 MO.ChangeToGA(ImmOp.getGlobal(), ImmOp.getOffset(), in foldIntoMemoryOps()
527 ImmOp.getTargetFlags()); in foldIntoMemoryOps()
530 MO.ChangeToMCSymbol(ImmOp.getMCSymbol(), ImmOp.getTargetFlags()); in foldIntoMemoryOps()
531 MO.setOffset(ImmOp.getOffset()); in foldIntoMemoryOps()
534 MO.ChangeToBA(ImmOp.getBlockAddress(), ImmOp.getOffset(), in foldIntoMemoryOps()
535 ImmOp.getTargetFlags()); in foldIntoMemoryOps()
544 UseMI.addOperand(ImmOp); in foldIntoMemoryOps()
H A DRISCVInstrInfoZb.td203 const MachineOperand &ImmOp = *Operands[1];
205 if (ImmOp.isReg() && ImmOp.getReg())
206 if (auto Val = getIConstantVRegValWithLookThrough(ImmOp.getReg(), MRI)) {
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonOptAddrMode.cpp114 bool changeStore(MachineInstr *OldMI, MachineOperand ImmOp,
116 bool changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, unsigned ImmOpNum);
118 const MachineOperand &ImmOp, unsigned ImmOpNum);
776 const MachineOperand ImmOp = AddMI->getOperand(2); in updateAddUses() local
785 OffsetOp.setImm(ImmOp.getImm() + OffsetOp.getImm()); in updateAddUses()
843 bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, in changeLoad() argument
862 MIB.add(ImmOp); in changeLoad()
871 const GlobalValue *GV = ImmOp.getGlobal(); in changeLoad()
872 int64_t Offset = ImmOp.getOffset() + OldMI->getOperand(2).getImm(); in changeLoad()
874 MIB.addGlobalAddress(GV, Offset, ImmOp.getTargetFlags()); in changeLoad()
[all …]
H A DHexagonConstExtenders.cpp1764 const MachineOperand &ImmOp = MI.getOperand(IsAddi ? 2 : 1); in replaceInstrExpr() local
1765 assert(Ex.Rs == RegOp && EV == ImmOp && Ex.Neg != IsAddi && in replaceInstrExpr()
1881 MachineOperand &ImmOp = P.first->getOperand(J+1); in replaceInstr() local
1882 ImmOp.setImm(ImmOp.getImm() + Diff); in replaceInstr()
H A DHexagonAsmPrinter.cpp254 MCOperand &ImmOp = Inst.getOperand(i); in ScaleVectorOffset() local
255 const auto *HE = static_cast<const HexagonMCExpr*>(ImmOp.getExpr()); in ScaleVectorOffset()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrPatternsVec.td43 multiclass vbrd_elem32<ValueType v32, ValueType s32, SDPatternOperator ImmOp,
46 def : Pat<(v32 (vec_broadcast (s32 ImmOp:$sy), i32:$vl)),
55 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
57 def : Pat<(v64 (vec_broadcast (s64 ImmOp:$sy), i32:$vl)),
100 SDPatternOperator ImmOp, SDNodeXForm ImmCast,
102 defm : vbrd_elem32<v32, s32, ImmOp, ImmCast, SuperRegCast>;
107 SDPatternOperator ImmOp, SDNodeXForm ImmCast> {
108 defm : vbrd_elem64<v64, s64, ImmOp, ImmCast>;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallFrameOptimization.cpp290 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
291 return ImmOp.getImm() == 0 ? Convert : Exit; in classifyInstruction()
296 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction() local
297 return ImmOp.getImm() == -1 ? Convert : Exit; in classifyInstruction()
H A DX86ExpandPseudo.cpp914 const MachineOperand &ImmOp = in expandMI() local
917 if (ImmOp.isImm() && isInt<8>(ImmOp.getImm())) in expandMI()
962 .add(ImmOp); in expandMI()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp158 const MachineOperand &ImmOp = DefInst->getOperand(2); in checkADDrr() local
159 if (!ImmOp.isImm() || ImmOp.getImm() != 0) in checkADDrr()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineDebugify.cpp148 auto ImmOp = MachineOperand::CreateImm(NextImm++); in applyDebugifyMetadataToMachineFunction() local
150 /*IsIndirect=*/false, ImmOp, LocalVar, Expr); in applyDebugifyMetadataToMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h872 unsigned ImmOp; in getAddSubImmediate() local
875 ImmOp = 2; in getAddSubImmediate()
879 ImmOp = 2; in getAddSubImmediate()
884 ImmOp = 3; in getAddSubImmediate()
890 return Scale * MI.getOperand(ImmOp).getImm(); in getAddSubImmediate()
H A DThumbRegisterInfo.cpp458 MachineOperand &ImmOp = MI.getOperand(ImmIdx); in rewriteFrameIndex() local
476 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteFrameIndex()
512 ImmOp.ChangeToImmediate(InstrOffs); in rewriteFrameIndex()
H A DThumb2InstrInfo.cpp736 MachineOperand &ImmOp = MI.getOperand(FrameRegIdx+1); in rewriteT2FrameIndex() local
762 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
780 ImmOp.ChangeToImmediate(ImmedOffset); in rewriteT2FrameIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp253 SDValue ImmOp = Op->getOperand(1); in SelectInlineAsmMemoryOperand() local
254 ConstantSDNode *ImmNode = dyn_cast<ConstantSDNode>(ImmOp); in SelectInlineAsmMemoryOperand()
293 Disp = ImmOp; in SelectInlineAsmMemoryOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/
H A DBPFAsmParser.cpp94 struct ImmOp { struct
102 ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp368 const MachineOperand *ImmOp = in isSafeToFoldImmIntoCopy() local
370 if (!ImmOp->isImm()) in isSafeToFoldImmIntoCopy()
387 Imm = ImmOp->getImm(); in isSafeToFoldImmIntoCopy()
H A DSIRegisterInfo.cpp1018 MachineOperand *ImmOp = &MI.getOperand(1); in resolveFrameIndex() local
1020 std::swap(FIOp, ImmOp); in resolveFrameIndex()
1022 if (!ImmOp->isImm()) { in resolveFrameIndex()
1029 int64_t TotalOffset = ImmOp->getImm() + Offset; in resolveFrameIndex()
1039 ImmOp->setImm(TotalOffset); in resolveFrameIndex()
1064 MachineOperand *ImmOp = &MI.getOperand(Src0Idx + 1); in resolveFrameIndex() local
1066 std::swap(FIOp, ImmOp); in resolveFrameIndex()
1068 if (!ImmOp->isImm()) { in resolveFrameIndex()
1074 int64_t TotalOffset = ImmOp->getImm() + Offset; in resolveFrameIndex()
1084 ImmOp->setImm(TotalOffset); in resolveFrameIndex()
H A DSIFoldOperands.cpp2221 const MachineOperand *ImmOp = nullptr; in isOMod() local
2225 ImmOp = Src0; in isOMod()
2228 ImmOp = Src1; in isOMod()
2233 int OMod = getOModValue(Op, ImmOp->getImm()); in isOMod()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/AsmParser/
H A DXtensaAsmParser.cpp127 struct ImmOp { struct
135 ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h57 struct ImmOp { struct
85 struct ImmOp Imm;
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsMSAInstrInfo.td1093 Operand ImmOp, ImmLeaf Imm, RegisterOperand ROWD,
1097 dag InOperandList = (ins ROWS:$ws, ImmOp:$m);
1121 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1124 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1127 SplatComplexPattern ImmOp, RegisterOperand ROWD,
1130 MSA_BIT_BINSXI_DESC_BASE<instr_asm, Ty, ImmOp, ROWD, ROWS, itin>;
1144 ValueType VecTy, Operand ImmOp, ImmLeaf Imm,
1148 dag InOperandList = (ins ROWS:$ws, ImmOp:$n);
1156 Operand ImmOp, ImmLeaf Imm,
1159 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ImmOp:$n);
[all …]
H A DMipsDSPInstrInfo.td334 Operand ImmOp, ImmLeaf immPat, InstrItinClass itin,
337 dag InOperandList = (ins ImmOp:$imm);
389 Operand ImmOp, SDPatternOperator Imm,
392 dag InOperandList = (ins GPR32Opnd:$rs, ImmOp:$sa, GPR32Opnd:$src);
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h703 MachineInstrBuilder buildSExtInReg(const DstOp &Res, const SrcOp &Op, int64_t ImmOp) { in buildSExtInReg() argument
704 return buildInstr(TargetOpcode::G_SEXT_INREG, {Res}, {Op, SrcOp(ImmOp)}); in buildSExtInReg()
810 int64_t ImmOp);
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/
H A DLanaiAsmParser.cpp123 struct ImmOp { struct
137 struct ImmOp Imm;

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