Home
last modified time | relevance | path

Searched refs:Idx1 (Results 1 – 18 of 18) sorted by relevance

/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuilder.h63 Address createConstGEP2_32(Address Addr, unsigned Idx0, unsigned Idx1, in createConstGEP2_32() argument
69 Addr.getElementType(), emitRawPointerFromAddress(Addr), Idx0, Idx1, in createConstGEP2_32()
73 Addr.getElementType(), emitRawPointerFromAddress(Addr), Idx0, Idx1, in createConstGEP2_32()
324 Address CreateConstInBoundsGEP2_32(Address Addr, unsigned Idx0, unsigned Idx1,
326 return createConstGEP2_32<true>(Addr, Idx0, Idx1, Name);
330 Address CreateConstGEP2_32(Address Addr, unsigned Idx0, unsigned Idx1,
332 return createConstGEP2_32<false>(Addr, Idx0, Idx1, Name);
H A DCGBuiltin.cpp11846 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); in EmitAArch64BuiltinExpr() local
11848 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
11858 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); in EmitAArch64BuiltinExpr() local
11860 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
11870 llvm::Value *Idx1 = llvm::ConstantInt::get(SizeTy, 1); in EmitAArch64BuiltinExpr() local
11872 Value *Op1 = Builder.CreateExtractElement(Vec, Idx1, "lane1"); in EmitAArch64BuiltinExpr()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetInstrInfo.cpp169 bool NewMI, unsigned Idx1, in commuteInstructionImpl() argument
177 unsigned CommutableOpIdx1 = Idx1; (void)CommutableOpIdx1; in commuteInstructionImpl()
180 CommutableOpIdx1 == Idx1 && CommutableOpIdx2 == Idx2 && in commuteInstructionImpl()
182 assert(MI.getOperand(Idx1).isReg() && MI.getOperand(Idx2).isReg() && in commuteInstructionImpl()
186 Register Reg1 = MI.getOperand(Idx1).getReg(); in commuteInstructionImpl()
189 unsigned SubReg1 = MI.getOperand(Idx1).getSubReg(); in commuteInstructionImpl()
191 bool Reg1IsKill = MI.getOperand(Idx1).isKill(); in commuteInstructionImpl()
193 bool Reg1IsUndef = MI.getOperand(Idx1).isUndef(); in commuteInstructionImpl()
195 bool Reg1IsInternal = MI.getOperand(Idx1).isInternalRead(); in commuteInstructionImpl()
200 Reg1.isPhysical() ? MI.getOperand(Idx1).isRenamable() : false; in commuteInstructionImpl()
[all …]
H A DShadowStackGCLowering.cpp81 Type *Ty, Value *BasePtr, int Idx1,
84 Type *Ty, Value *BasePtr, int Idx1, int Idx2,
H A DPeepholeOptimizer.cpp315 RecurrenceInstr(MachineInstr *MI, unsigned Idx1, unsigned Idx2) in RecurrenceInstr() argument
316 : MI(MI), CommutePair(std::make_pair(Idx1, Idx2)) {} in RecurrenceInstr()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td1198 foreach Idx1 = 1...4 in {
1199 defvar CImm = !add(1, !shl(!add(1, !shl(1, Idx0)), Idx1));
1202 GPR:$r, (i32 Idx1))>;
1206 foreach Idx1 = 1...4 in {
1208 defvar CImm = !add(Cb, !shl(Cb, Idx1));
1211 (ALSL_W GPR:$r, GPR:$r, (i32 Idx0)), (i32 Idx1))>;
1218 foreach Idx1 = 1...4 in {
1219 defvar CImm = !add(1, !shl(!add(1, !shl(1, Idx0)), Idx1));
1222 GPR:$r, (i64 Idx1))>;
1225 GPR:$r, (i64 Idx1))>;
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIRBuilder.h1904 Value *CreateConstGEP2_32(Type *Ty, Value *Ptr, unsigned Idx0, unsigned Idx1,
1908 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
1918 unsigned Idx1, const Twine &Name = "") {
1921 ConstantInt::get(Type::getInt32Ty(Context), Idx1)
1950 Value *CreateConstGEP2_64(Type *Ty, Value *Ptr, uint64_t Idx0, uint64_t Idx1,
1954 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
1964 uint64_t Idx1, const Twine &Name = "") {
1967 ConstantInt::get(Type::getInt64Ty(Context), Idx1)
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.cpp1525 CodeGenSubRegIndex *Idx1 = I1.first; in computeComposites() local
1544 Idx1->addComposite(Idx2, Idx3, getHwModes())) { in computeComposites()
1546 if (!UserDefined.count({Idx1, Idx2}) || in computeComposites()
1547 agree(compose(Idx1, Idx2), SubRegAction.at(Idx3))) in computeComposites()
1548 PrintWarning(Twine("SubRegIndex ") + Idx1->getQualifiedName() + in computeComposites()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp3004 auto CanPreserveInBounds = [&](bool AddIsNSW, Value *Idx1, Value *Idx2) { in visitGetElementPtrInst() argument
3006 return GEP.isInBounds() && AddIsNSW && isKnownNonNegative(Idx1, Q) && in visitGetElementPtrInst()
3011 Value *Idx1, *Idx2; in visitGetElementPtrInst() local
3013 m_OneUse(m_Add(m_Value(Idx1), m_Value(Idx2))))) { in visitGetElementPtrInst()
3021 Idx1, Idx2); in visitGetElementPtrInst()
3024 Idx1, "", IsInBounds); in visitGetElementPtrInst()
3031 m_Value(Idx1), m_ConstantInt(C))))))) { in visitGetElementPtrInst()
3039 /*IsNSW=*/true, Idx1, C); in visitGetElementPtrInst()
3042 Builder.CreateSExt(Idx1, GEP.getOperand(1)->getType()), "", in visitGetElementPtrInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp1830 unsigned Idx1; in getSubRegIdxs() local
1844 Idx1 = Idxs[0][Paired.Width - 1]; in getSubRegIdxs()
1848 Idx1 = Idxs[CI.Width][Paired.Width - 1]; in getSubRegIdxs()
1851 return {Idx0, Idx1}; in getSubRegIdxs()
H A DSIISelLowering.cpp7416 const int Idx1 = SVN->getMaskElt(I + 1); in lowerVECTOR_SHUFFLE() local
7418 int VecIdx1 = Idx1 < SrcNumElts ? 0 : 1; in lowerVECTOR_SHUFFLE()
7420 int EltIdx1 = Idx1 < SrcNumElts ? Idx1 : Idx1 - SrcNumElts; in lowerVECTOR_SHUFFLE()
14462 SDValue Idx1 = Op1.getOperand(1); in performFMACombine() local
14483 if (Idx1 != Op2.getOperand(1) || Idx2 != FMAOp2.getOperand(1) || in performFMACombine()
14485 Idx1 == Idx2) in performFMACombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.h725 unsigned commuteOperandsForFold(MachineInstr &MI, unsigned Idx1) const;
H A DX86InstrInfo.cpp7317 unsigned Idx1) const { in commuteOperandsForFold()
7319 if (!findCommutedOpIndices(MI, Idx1, Idx2)) in commuteOperandsForFold()
7320 return Idx1; in commuteOperandsForFold()
7324 Register Reg1 = MI.getOperand(Idx1).getReg(); in commuteOperandsForFold()
7326 bool Tied1 = 0 == MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO); in commuteOperandsForFold()
7332 return Idx1; in commuteOperandsForFold()
7334 return commuteInstruction(MI, false, Idx1, Idx2) ? Idx2 : Idx1; in commuteOperandsForFold()
H A DX86ISelLowering.cpp39563 unsigned Idx1 = (M1 & 2) ? (SrcVT.getVectorNumElements() / 2) : 0; in canonicalizeShuffleMaskWithHorizOp() local
39565 SDValue V1 = extract128BitVector(BC[0].getOperand(M1 & 1), Idx1, DAG, DL); in canonicalizeShuffleMaskWithHorizOp()
56287 uint64_t Idx1 = Ops[1].getConstantOperandVal(1); in combineConcatVectorOps() local
56288 uint64_t Idx = ((Idx1 & 3) << 2) | (Idx0 & 3); in combineConcatVectorOps()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVectorCombine.cpp2788 Value *Idx1 = Gep1->getOperand(1); in calculatePointerDifference() local
2792 Simplify(CallBuilder(B, CreateSub(Idx0, Idx1))))) in calculatePointerDifference()
2796 KnownBits Known1 = getKnownBits(Idx1, Gep1); in calculatePointerDifference()
2803 Value *AndU1 = Simplify(CallBuilder(B, CreateAnd(Idx1, MaskU))); in calculatePointerDifference()
2814 Value *AndK1 = Simplify(CallBuilder(B, CreateAnd(Idx1, MaskK))); in calculatePointerDifference()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp2958 &BuildVector](ArrayRef<int> Mask, unsigned Idx1, unsigned Idx2) { in SplitVecRes_VECTOR_SHUFFLE()
2959 if (AccumulateResults(Idx1)) { in SplitVecRes_VECTOR_SHUFFLE()
2960 if (Inputs[Idx1]->getOpcode() == ISD::BUILD_VECTOR && in SplitVecRes_VECTOR_SHUFFLE()
2962 Output = BuildVector(Inputs[Idx1], Inputs[Idx2], Mask); in SplitVecRes_VECTOR_SHUFFLE()
2964 Output = DAG.getVectorShuffle(NewVT, DL, Inputs[Idx1], in SplitVecRes_VECTOR_SHUFFLE()
2967 if (TmpInputs[Idx1]->getOpcode() == ISD::BUILD_VECTOR && in SplitVecRes_VECTOR_SHUFFLE()
2969 Output = BuildVector(TmpInputs[Idx1], TmpInputs[Idx2], Mask); in SplitVecRes_VECTOR_SHUFFLE()
2971 Output = DAG.getVectorShuffle(NewVT, DL, TmpInputs[Idx1], in SplitVecRes_VECTOR_SHUFFLE()
2974 Inputs[Idx1] = Output; in SplitVecRes_VECTOR_SHUFFLE()
2954 __anon75d1774a0a02(ArrayRef<int> Mask, unsigned Idx1, unsigned Idx2) SplitVecRes_VECTOR_SHUFFLE() argument
/freebsd/contrib/llvm-project/clang/lib/AST/
H A DExpr.cpp4250 auto Idx1 = Array1->getIdx(); in isSameComparisonOperand() local
4252 const auto Integer1 = dyn_cast<IntegerLiteral>(Idx1); in isSameComparisonOperand()
4259 if (!isSameComparisonOperand(Idx1, Idx2)) in isSameComparisonOperand()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp1556 int Idx1 = Ex1Idx->getZExtValue(); in getShallowScore() local
1558 int Dist = Idx2 - Idx1; in getShallowScore()
4890 std::optional<unsigned> Idx1 = getElementIndex(IE1); in areTwoInsertFromSameBuildVector() local
4892 if (Idx1 == std::nullopt || Idx2 == std::nullopt) in areTwoInsertFromSameBuildVector()
4906 unsigned Idx1 = getElementIndex(IE1).value_or(*Idx2); in areTwoInsertFromSameBuildVector() local
4907 IsReusedIdx |= ReusedIdx.test(Idx1); in areTwoInsertFromSameBuildVector()
4908 ReusedIdx.set(Idx1); in areTwoInsertFromSameBuildVector()
4915 unsigned Idx2 = getElementIndex(IE2).value_or(*Idx1); in areTwoInsertFromSameBuildVector()
10301 unsigned Idx1 = *getElementIndex(IE1); in isFirstInsertElement() local
10314 getElementIndex(I2).value_or(Idx1) ! in isFirstInsertElement()
[all...]