| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 205 INTRINSIC_VOID, enumerator
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| H A D | SelectionDAGNodes.h | 700 NodeType == ISD::INTRINSIC_VOID) &&
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelDAGToDAG.cpp | 231 case ISD::INTRINSIC_VOID: { in Select()
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| H A D | WebAssemblyISelLowering.cpp | 357 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in WebAssemblyTargetLowering()
916 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
1478 case ISD::INTRINSIC_VOID: in LowerOperation()
1846 case ISD::INTRINSIC_VOID: in LowerIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/GlobalISel/ |
| H A D | SelectionDAGCompat.td | 127 // ISD::INTRINSIC_VOID can also be handled with G_INTRINSIC_W_SIDE_EFFECTS.
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 154 case ISD::INTRINSIC_VOID: in getOperationName()
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| H A D | TargetLowering.cpp | 3733 Op.getOpcode() == ISD::INTRINSIC_VOID) && in computeKnownBitsForTargetNode()
3767 Op.getOpcode() == ISD::INTRINSIC_VOID) && in ComputeNumSignBitsForTargetNode()
3785 Op.getOpcode() == ISD::INTRINSIC_VOID) && in SimplifyDemandedVectorEltsForTargetNode()
3797 Op.getOpcode() == ISD::INTRINSIC_VOID) && in SimplifyDemandedBitsForTargetNode()
3811 Op.getOpcode() == ISD::INTRINSIC_VOID) && in SimplifyMultipleUseDemandedBitsForTargetNode()
3845 Op.getOpcode() == ISD::INTRINSIC_VOID) && in isGuaranteedNotToBeUndefOrPoisonForTargetNode()
3865 Op.getOpcode() == ISD::INTRINSIC_VOID) && in canCreateUndefOrPoisonForTargetNode()
3879 Op.getOpcode() == ISD::INTRINSIC_VOID) && in isKnownNeverNaNForTargetNode()
3893 Op.getOpcode() == ISD::INTRINSIC_VOID) && in isSplatValueForTargetNode()
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| H A D | SelectionDAG.cpp | 933 case ISD::INTRINSIC_VOID: in AddNodeIDCustom()
2787 Opcode == ISD::INTRINSIC_W_CHAIN || Opcode == ISD::INTRINSIC_VOID) in isSplatValue()
4206 case ISD::INTRINSIC_VOID: in computeKnownBits()
5097 Opcode == ISD::INTRINSIC_VOID) { in ComputeNumSignBits()
5208 Opcode == ISD::INTRINSIC_W_CHAIN || Opcode == ISD::INTRINSIC_VOID) in isGuaranteedNotToBeUndefOrPoison()
5352 Opcode == ISD::INTRINSIC_W_CHAIN || Opcode == ISD::INTRINSIC_VOID) in canCreateUndefOrPoison()
5497 Opcode == ISD::INTRINSIC_VOID) { in isKnownNeverNaN()
8743 assert((Opcode == ISD::INTRINSIC_VOID || in getMemIntrinsicNode()
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| H A D | SelectionDAGISel.cpp | 4371 N->getOpcode() != ISD::INTRINSIC_VOID) { in CannotYetSelect()
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| H A D | LegalizeDAG.cpp | 983 case ISD::INTRINSIC_VOID: in LegalizeOp()
4338 case ISD::INTRINSIC_VOID: in ExpandNode()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 165 {ISD::STORE, ISD::ADD, ISD::INTRINSIC_VOID, ISD::INTRINSIC_W_CHAIN}); in XCoreTargetLowering()
1498 case ISD::INTRINSIC_VOID: in PerformDAGCombine()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600ISelLowering.cpp | 196 setOperationAction({ISD::INTRINSIC_VOID, ISD::INTRINSIC_WO_CHAIN}, MVT::Other, in R600TargetLowering()
425 case ISD::INTRINSIC_VOID: { in LowerOperation()
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| H A D | SIISelLowering.cpp | 873 setOperationAction(ISD::INTRINSIC_VOID, in SITargetLowering()
952 ISD::INTRINSIC_VOID, in SITargetLowering()
1240 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
1254 Info.opc = CI.getType()->isVoidTy() ? ISD::INTRINSIC_VOID : in getTgtMemIntrinsic()
1390 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
1410 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
4186 DAG.getNode(ISD::INTRINSIC_VOID, SL, Op->getVTList(), Op.getOperand(0), in lowerSET_ROUNDING()
4287 DAG.getNode(ISD::INTRINSIC_VOID, SL, MVT::Other, Op.getOperand(0), in lowerSET_FPENV()
4290 DAG.getNode(ISD::INTRINSIC_VOID, SL, MVT::Other, Op.getOperand(0), in lowerSET_FPENV()
5787 case ISD::INTRINSIC_VOID: return LowerINTRINSIC_VOID(Op, DAG); in LowerOperation()
[all …]
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| H A D | AMDGPUISelDAGToDAG.cpp | 695 case ISD::INTRINSIC_VOID: { in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 902 case ISD::INTRINSIC_VOID: { in trySelect()
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| H A D | MipsSEISelLowering.cpp | 212 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in MipsSETargetLowering()
463 case ISD::INTRINSIC_VOID: return lowerINTRINSIC_VOID(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 4538 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
4563 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
4584 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
4601 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
4614 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 662 setOperationAction(ISD::INTRINSIC_VOID, MVT::i8, Custom); in PPCTargetLowering()
663 setOperationAction(ISD::INTRINSIC_VOID, MVT::i16, Custom); in PPCTargetLowering()
664 setOperationAction(ISD::INTRINSIC_VOID, MVT::i32, Custom); in PPCTargetLowering()
665 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in PPCTargetLowering()
1370 setOperationAction(ISD::INTRINSIC_VOID, MVT::i128, Custom); in PPCTargetLowering()
1398 ISD::INTRINSIC_W_CHAIN, ISD::INTRINSIC_VOID}); in PPCTargetLowering()
11300 return DAG.getMemIntrinsicNode(ISD::INTRINSIC_VOID, dl, Tys, Ops, MemVT, in LowerATOMIC_LOAD_STORE()
11874 case ISD::INTRINSIC_VOID: in LowerOperation()
13892 if (N->getOpcode() == ISD::INTRINSIC_VOID) { in isConsecutiveLS()
15322 case ISD::INTRINSIC_VOID: { in expandVSXStoreForLE()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 676 ISD::INTRINSIC_VOID}, in RISCVTargetLowering()
679 setOperationAction({ISD::INTRINSIC_W_CHAIN, ISD::INTRINSIC_VOID}, in RISCVTargetLowering()
685 setOperationAction({ISD::INTRINSIC_W_CHAIN, ISD::INTRINSIC_VOID}, in RISCVTargetLowering()
1469 setTargetDAGCombine({ISD::INTRINSIC_VOID, ISD::INTRINSIC_W_CHAIN, in RISCVTargetLowering()
1572 Info.opc = IsStore ? ISD::INTRINSIC_VOID : ISD::INTRINSIC_W_CHAIN; in getTgtMemIntrinsic()
6374 case ISD::INTRINSIC_VOID: in LowerOperation()
8765 assert((Op.getOpcode() == ISD::INTRINSIC_VOID || in lowerVectorIntrinsicScalars()
8773 bool HasChain = Op.getOpcode() == ISD::INTRINSIC_VOID || in lowerVectorIntrinsicScalars()
9015 bool HasChain = Op.getOpcode() == ISD::INTRINSIC_VOID || in promoteVCIXScalar()
9598 return DAG.getMemIntrinsicNode(ISD::INTRINSIC_VOID, DL, Store->getVTList(), in LowerINTRINSIC_VOID()
[all …]
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| H A D | RISCVISelDAGToDAG.cpp | 822 assert(Node->getOpcode() == ISD::INTRINSIC_VOID && "Unexpected opcode"); in selectSF_VC_X_SE()
1998 case ISD::INTRINSIC_VOID: { in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 98 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in LoongArchTargetLowering()
138 setOperationAction(ISD::INTRINSIC_VOID, MVT::i32, Custom); in LoongArchTargetLowering()
152 setOperationAction(ISD::INTRINSIC_VOID, MVT::i64, Custom); in LoongArchTargetLowering()
390 case ISD::INTRINSIC_VOID: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1037 ISD::INTRINSIC_VOID, ISD::VECREDUCE_ADD, ISD::ADD, ISD::BITCAST}); in ARMTargetLowering()
1180 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in ARMTargetLowering()
4297 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
6464 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_ROUNDING()
6492 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_FPMODE()
6515 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerRESET_FPMODE()
10598 case ISD::INTRINSIC_VOID: return LowerINTRINSIC_VOID(Op, DAG, Subtarget); in LowerOperation()
16158 const bool isIntrinsic = (N->getOpcode() == ISD::INTRINSIC_VOID || in CombineBaseUpdate()
19063 case ISD::INTRINSIC_VOID: in PerformDAGCombine()
21064 Info.opc = ISD::INTRINSIC_VOID; in getTgtMemIntrinsic()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1523 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in HexagonTargetLowering()
3398 case ISD::INTRINSIC_VOID: return LowerINTRINSIC_VOID(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1113 setTargetDAGCombine({ISD::INTRINSIC_VOID, ISD::INTRINSIC_W_CHAIN, in AArch64TargetLowering()
1789 setOperationAction(ISD::INTRINSIC_VOID, MVT::Other, Custom); in AArch64TargetLowering()
2394 case ISD::INTRINSIC_VOID: { in computeKnownBitsForTargetNode()
5153 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_ROUNDING()
5187 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_FPMODE()
5212 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerRESET_FPMODE()
6934 case ISD::INTRINSIC_VOID: in LowerOperation()
8405 ISD::INTRINSIC_VOID, DL, MVT::Other, Chain, in LowerCall()
8961 ISD::INTRINSIC_VOID, DL, MVT::Other, Result, in LowerCall()
15490 Info.opc = ISD::INTRINSIC_VOID; in setInfoSVEStN()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 2954 Parent->getOpcode() != ISD::INTRINSIC_VOID && // nontemporal stores in selectAddr()
5154 case ISD::INTRINSIC_VOID: { in Select()
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