| /freebsd/share/mk/ |
| H A D | bsd.incs.mk | 78 installincludes: _${group}INS
79 _${group}INS: ${_${group}INCS}
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | SelectOptimize.cpp | 750 SmallPtrSet<const Instruction *, 2> INS; in convertProfitableSIGroups() local
752 INS.insert(SI.getI()); in convertProfitableSIGroups()
763 PN->addIncoming(getTrueOrFalseValue(SI, true, INS, IB), TrueBlock); in convertProfitableSIGroups()
764 PN->addIncoming(getTrueOrFalseValue(SI, false, INS, IB), FalseBlock); in convertProfitableSIGroups()
767 INS.erase(SI.getI()); in convertProfitableSIGroups()
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| H A D | CodeGenPrepare.cpp | 7276 SmallPtrSet<const Instruction *, 2> INS; in optimizeSelectInst() local
7277 INS.insert(ASI.begin(), ASI.end()); in optimizeSelectInst()
7286 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock); in optimizeSelectInst()
7287 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock); in optimizeSelectInst()
7292 INS.erase(SI); in optimizeSelectInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEFrameLowering.cpp | 656 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
664 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
673 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
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| H A D | MipsSEISelDAGToDAG.cpp | 247 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
258 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
1035 Opcode = Mips::INS; in trySelect()
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| H A D | MipsInstrInfo.cpp | 856 case Mips::INS: in verifyInstruction()
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| H A D | MipsSchedule.td | 137 def II_INS : InstrItinClass; // Any INS instruction
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| H A D | MipsScheduleP5600.td | 206 def : InstRW<[P5600WriteAL2BitExt], (instrs EXT, INS)>;
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| H A D | MipsScheduleGeneric.td | 48 CLO, CLZ, EXT, INS, LEA_ADDiu, LUi, NOP,
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| H A D | MipsInstrInfo.td | 2424 def INS : MMRel, StdMMR6Rel, InsBase<"ins", GPR32Opnd, uimm5,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedCyclone.td | 349 // INS V[x],V[y] is a WriteV.
359 // INS V[x],R
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| H A D | AArch64SchedTSV110.td | 673 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(DUP|INS)v.+lane")>;
681 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^(INS|DUP)v.+gpr")>;
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| H A D | AArch64InstrInfo.td | 6660 // AdvSIMD INS/DUP instructions
6825 defm INS : SIMDIns;
6979 // index type and INS extension
7006 ValueType VTScal, Instruction INS> {
7010 (INS V128:$src, imm:$Immd, V128:$Rn, imm:$Immn)>;
7015 (INS V128:$src, imm:$Immd,
7021 (EXTRACT_SUBREG (INS (SUBREG_TO_REG (i64 0), V64:$src, dsub),
7029 (INS (SUBREG_TO_REG (i64 0), V64:$src, dsub), imm:$Immd,
7091 // INS.
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| H A D | AArch64InstrFormats.td | 7781 // AdvSIMD INS/DUP instructions
8070 // For all forms of the INS instruction, the "mov" mnemonic is the
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | wordprocessors | 179 # like: WP51.INS
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrMisc.td | 978 // Repeat (used with INS, OUTS, MOVS, LODS and STOS)
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| /freebsd/share/misc/ |
| H A D | usb_vendors | 22307 0017 MTi-G 7xx GNSS/INS
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| /freebsd/contrib/ncurses/misc/ |
| H A D | terminfo.src | 17550 # appears that we cannot use naked INS LINE feature since it uses
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