Home
last modified time | relevance | path

Searched refs:INS (Results 1 – 19 of 19) sorted by relevance

/freebsd/share/mk/
H A Dbsd.incs.mk78 installincludes: _${group}INS
79 _${group}INS: ${_${group}INCS}
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSelectOptimize.cpp721 SmallDenseMap<Instruction *, std::pair<Value *, Value *>, 2> INS; in convertProfitableSIGroups() local
741 auto *TV = getTrueOrFalseValue(SI, true, INS, TrueBlock); in convertProfitableSIGroups()
742 auto *FV = getTrueOrFalseValue(SI, false, INS, FalseBlock); in convertProfitableSIGroups()
743 INS[PN] = {TV, FV}; in convertProfitableSIGroups()
H A DCodeGenPrepare.cpp7672 SmallPtrSet<const Instruction *, 2> INS(llvm::from_range, ASI); in optimizeSelectInst() local
7681 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock); in optimizeSelectInst()
7682 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock); in optimizeSelectInst()
7687 INS.erase(SI); in optimizeSelectInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEFrameLowering.cpp621 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
629 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
638 BuildMI(MBB, MBBI, DL, STI.getInstrInfo()->get(Mips::INS), Mips::K1) in emitInterruptPrologueStub()
H A DMipsSEISelDAGToDAG.cpp243 SDNode *DSPCFWithCarry = CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, Ops); in selectAddE()
254 CurDAG->getMachineNode(Mips::INS, DL, MVT::i32, InsOps); in selectAddE()
981 Opcode = Mips::INS; in trySelect()
H A DMipsInstrInfo.cpp895 case Mips::INS: in verifyInstruction()
H A DMipsScheduleI6400.td116 DSUB, DSUBu, EXT, INS, LSA, LSA_R6, LUi, MFC1, MFC1_D64,
H A DMipsSchedule.td137 def II_INS : InstrItinClass; // Any INS instruction
H A DMipsScheduleP5600.td206 def : InstRW<[P5600WriteAL2BitExt], (instrs EXT, INS)>;
H A DMipsScheduleGeneric.td48 CLO, CLZ, EXT, INS, LEA_ADDiu, LUi, NOP,
H A DMipsInstrInfo.td2436 def INS : MMRel, StdMMR6Rel, InsBase<"ins", GPR32Opnd, uimm5,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td349 // INS V[x],V[y] is a WriteV.
359 // INS V[x],R
H A DAArch64SchedTSV110.td673 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(DUP|INS)v.+lane")>;
681 def : InstRW<[TSV110Wr_4cyc_1F], (instregex "^(INS|DUP)v.+gpr")>;
H A DAArch64InstrInfo.td7157 // AdvSIMD INS/DUP instructions
7314 defm INS : SIMDIns;
7464 // index type and INS extension
7492 … ValueType VTScal, Operand SVEIdxTy, Instruction INS, Instruction DUP, SubRegIndex DUPSub> {
7504 (INS VT128:$Rn, imm:$Immd, (VT128 (EXTRACT_SUBREG ZPR:$Rm, zsub)), SVEIdxTy:$Immn)>;
7510 (INS (SUBREG_TO_REG (i64 0), VT64:$Rn, dsub), imm:$Immd,
7517 (INS V128:$src, imm:$Immd, V128:$Rn, imm:$Immn)>;
7527 (INS V128:$src, imm:$Immd,
7533 (EXTRACT_SUBREG (INS (VT128 (SUBREG_TO_REG (i64 0), V64:$src, dsub)),
7541 (INS (SUBREG_TO_REG (i64 0), V64:$src, dsub), imm:$Immd,
[all …]
H A DAArch64InstrFormats.td8181 // AdvSIMD INS/DUP instructions
8470 // For all forms of the INS instruction, the "mov" mnemonic is the
/freebsd/contrib/file/magic/Magdir/
H A Dwordprocessors179 # like: WP51.INS
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrMisc.td978 // Repeat (used with INS, OUTS, MOVS, LODS and STOS)
/freebsd/share/misc/
H A Dusb_vendors22365 0017 MTi-G 7xx GNSS/INS
/freebsd/contrib/ncurses/misc/
H A Dterminfo.src17986 # appears that we cannot use naked INS LINE feature since it uses