| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 87 case ISD::INLINEASM_BR: break; in numberRCValPredInSU()
124 case ISD::INLINEASM_BR: break; in numberRCValSuccInSU()
449 case ISD::INLINEASM_BR: in SUSchedulingCost()
552 case ISD::INLINEASM_BR: in initNumRegDefsLeft()
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| H A D | InstrEmitter.cpp | 1318 case ISD::INLINEASM_BR: { in EmitSpecialNode()
1324 unsigned TgtOpc = Node->getOpcode() == ISD::INLINEASM_BR in EmitSpecialNode()
1325 ? TargetOpcode::INLINEASM_BR in EmitSpecialNode()
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| H A D | ScheduleDAGFast.cpp | 488 Node->getOpcode() == ISD::INLINEASM_BR) { in DelayForLiveRegsBottomUp()
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| H A D | SelectionDAGDumper.cpp | 189 case ISD::INLINEASM_BR: return "inlineasm_br"; in getOperationName()
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| H A D | ScheduleDAGRRList.cpp | 719 case ISD::INLINEASM_BR: in EmitNode()
1365 Node->getOpcode() == ISD::INLINEASM_BR) { in DelayForLiveRegsBottomUp()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | PHIEliminationUtils.cpp | 55 I->getOpcode() == TargetOpcode::INLINEASM_BR) { in findPHICopyInsertPoint()
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| H A D | VLIWMachineScheduler.cpp | 126 case TargetOpcode::INLINEASM_BR: in isResourceAvailable()
176 case TargetOpcode::INLINEASM_BR: in reserveResources()
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| H A D | TailDuplicator.cpp | 657 if (MI.getOpcode() == TargetOpcode::INLINEASM_BR) in shouldTailDuplicate()
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| H A D | RegAllocFast.cpp | 1097 if (MI.getOpcode() == TargetOpcode::INLINEASM_BR) { in defineVirtReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64CompressJumpTables.cpp | 80 MI.getOpcode() == AArch64::INLINEASM_BR) in computeBlockSize()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMergeBaseOffset.cpp | 418 case RISCV::INLINEASM_BR: { in foldIntoMemoryOps()
498 UseMI.getOpcode() == RISCV::INLINEASM_BR) { in foldIntoMemoryOps()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.cpp | 299 case TargetOpcode::INLINEASM_BR: { in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1138 INLINEASM_BR, enumerator
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| H A D | MachineInstr.h | 1400 getOpcode() == TargetOpcode::INLINEASM_BR;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelDAGToDAG.cpp | 340 case ISD::INLINEASM_BR: { in Select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCombinerHelper.cpp | 88 case TargetOpcode::INLINEASM_BR: in hasSourceMods()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelDAGToDAG.cpp | 113 case ISD::INLINEASM_BR: in INITIALIZE_PASS()
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| H A D | CSKYInstrInfo.cpp | 612 case TargetOpcode::INLINEASM_BR: in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.cpp | 494 case TargetOpcode::INLINEASM_BR: { in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchInstrInfo.cpp | 224 Opcode == TargetOpcode::INLINEASM_BR) { in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 426 case PPC::INLINEASM_BR: in gatherVectorInstructions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 672 case TargetOpcode::INLINEASM_BR: { // Inline Asm: Variable size. in getInstSizeInBytes()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | Thumb2InstrInfo.cpp | 566 if (Opcode == ARM::INLINEASM || Opcode == ARM::INLINEASM_BR) in rewriteT2FrameIndex()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 671 Op.getOpcode() != ISD::INLINEASM_BR) || HMFI.hasClobberLR()) in LowerINLINEASM()
1519 setOperationAction(ISD::INLINEASM_BR, MVT::Other, Custom); in HexagonTargetLowering()
3344 if (Opc == ISD::INLINEASM || Opc == ISD::INLINEASM_BR) in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | TargetOpcodes.def | 31 HANDLE_TARGET_OPCODE(INLINEASM_BR)
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