Home
last modified time | relevance | path

Searched refs:IMX8MM_SYS_PLL1_80M (Results 1 – 13 of 13) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-phygate-tauri-l-rs232-rs232.dtso34 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
43 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-phygate-tauri-l-rs232-rs485.dtso35 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
44 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-emcon.dtsi555 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
563 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
571 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
579 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-phygate-tauri-l-rs232-rts-cts.dtso21 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-tqma8mqml-mba8mx.dts116 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
121 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-ucm-som.dtsi321 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
329 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
343 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-phygate-tauri-l.dts224 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
233 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-phyboard-polis-rdk.dts234 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
244 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-beacon-som.dtsi243 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-innocomm-wb15.dtsi224 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-var-som.dtsi272 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
H A Dimx8mm-beacon-baseboard.dtsi340 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dimx8mm-clock.h58 #define IMX8MM_SYS_PLL1_80M 49 macro