Searched refs:HI16 (Results 1 – 9 of 9) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYMCCodeEmitter.cpp | 62 uint16_t HI16 = static_cast<uint16_t>(Bin >> 16); writeData() local 236 uint16_t HI16 = static_cast<uint16_t>(Bin >> 16); encodeInstruction() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMExpandPseudoInsts.cpp | 1070 MachineInstrBuilder LO16, HI16; in ExpandMOV32BitImm() local 1084 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri)) in ExpandMOV32BitImm() 1091 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri)) in ExpandMOV32BitImm() 1101 HI16 = HI16.addImm(SOImmValV2); in ExpandMOV32BitImm() 1103 HI16.cloneMemRefs(MI); in ExpandMOV32BitImm() 1105 HI16.setMIFlags(MIFlags); in ExpandMOV32BitImm() 1107 HI16.addImm(Pred).addReg(PredReg).add(condCodeOp()); in ExpandMOV32BitImm() 1111 HI16.copyImplicitOps(MI); in ExpandMOV32BitImm() 1139 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc)) in ExpandMOV32BitImm() 1142 HI16.setMIFlags(MIFlags); in ExpandMOV32BitImm() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiInstrInfo.td | 71 def HI16 : SDNodeXForm<imm, [{ 152 return ((N->getZExtValue() & 0xFFFF0000UL) == N->getZExtValue());}], HI16> { 161 return ((N->getZExtValue() & 0xFFFFUL) == 0xFFFFUL);}], HI16> { 835 def : Pat<(i32 imm:$imm), (OR_I_LO (MOVHI (HI16 imm:$imm)), (LO16 imm:$imm))>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.td | 497 def HI16 : SDNodeXForm<imm, [{ 559 }], HI16>; 570 }], HI16>; 3117 (ORI (LIS (HI16 imm:$imm)), (LO16 imm:$imm))>; 3130 (ORIS (ORI $in, (LO16 imm:$imm)), (HI16 imm:$imm))>; 3133 (XORIS (XORI $in, (LO16 imm:$imm)), (HI16 imm:$imm))>; 3795 (EXTRACT_SUBREG (CMPLWI (XORIS $s1, (HI16 imm:$imm)), 3835 (EXTRACT_SUBREG (CMPLDI (XORIS8 $s1, (HI16 imm:$imm)), 3865 (EXTRACT_SUBREG (CMPLWI (XORIS $s1, (HI16 imm:$imm)), 3894 (EXTRACT_SUBREG (CMPLDI (XORIS8 $s1, (HI16 imm:$imm)),
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H A D | PPCInstrP10.td | 2031 (EXTRACT_SUBREG (CMPLWI (XORIS $s1, (HI16 imm:$imm)), 2038 (EXTRACT_SUBREG (CMPLDI (XORIS8 $s1, (HI16 imm:$imm)),
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.td | 602 // This is the base class for VGPR{128..255}_{LO16,HI16}. 616 // This is the base class for VGPR{0..127}_{LO16,HI16}.
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | Mips64InstrInfo.td | 649 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16)>, ISA_MIPS3, GPR_64; 652 (ORi64 (DSLL (ORi64 ZERO_64, (HI16 imm:$imm)), 16),
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H A D | MipsInstrInfo.td | 1197 def HI16 : SDNodeXForm<imm, [{ 3129 (ORiOp (LUiOp (HI16 imm:$imm)), (LO16 imm:$imm))>; 3132 def : MipsPat<(VT LUiPred:$imm), (LUiOp (HI16 imm:$imm))>;
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchInstrInfo.td | 506 def HI16 : SDNodeXForm<imm, [{ 1173 (ADDU16I_D GPR:$rj, (HI16 $imm))>;
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