Searched refs:GLD1_MERGE_ZERO (Results 1 – 3 of 3) sorted by relevance
397 GLD1_MERGE_ZERO, enumerator
2781 MAKE_CASE(AArch64ISD::GLD1_MERGE_ZERO) in getTargetNodeName()6143 AArch64ISD::GLD1_MERGE_ZERO}, in getGatherVecOpcode()6147 AArch64ISD::GLD1_MERGE_ZERO}, in getGatherVecOpcode()6168 case AArch64ISD::GLD1_MERGE_ZERO: in getSignExtendedGatherOpcode()18969 case AArch64ISD::GLD1_MERGE_ZERO: in performSVEAndCombine()22319 assert(((Opc >= AArch64ISD::GLD1_MERGE_ZERO && // unsigned gather loads in performGLD1Combine()24674 ? AArch64ISD::GLD1_MERGE_ZERO in performGatherLoadCombine()24781 case AArch64ISD::GLD1_MERGE_ZERO: in performSignExtendInRegCombine()25379 case AArch64ISD::GLD1_MERGE_ZERO: in PerformDAGCombine()25489 return performGatherLoadCombine(N, DAG, AArch64ISD::GLD1_MERGE_ZERO); in PerformDAGCombine()
69 def AArch64ld1_gather_z : SDNode<"AArch64ISD::GLD1_MERGE_ZERO", SDT_AArch64…