Home
last modified time | relevance | path

Searched refs:G8RC (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp760 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerDynamicAlloc() local
762 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerDynamicAlloc()
826 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in prepareDynamicAlloca() local
851 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
859 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca()
969 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRSpilling() local
972 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
984 Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRSpilling()
1014 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in lowerCRRestore() local
1017 Register Reg = MF.getRegInfo().createVirtualRegister(LP64 ? G8RC : GPRC); in lowerCRRestore()
[all …]
H A DPPCRegisterInfo.td350 def G8RC : RegisterClass<"PPC", [i64], 64, (add (sequence "X%u", 2, 12),
355 let AltOrders = [(add (sub G8RC, X2), X2),
377 def G8RC_NOX0 : RegisterClass<"PPC", [i64], 64, (add (sub G8RC, X0), ZERO8)> {
443 def SPILLTOVSRRC : RegisterClass<"PPC", [i64, f64], 64, (add G8RC, (sub VSFRC,
500 // Make AllocationOrder as similar as G8RC's to avoid potential spilling.
541 def g8rc : RegisterOperand<G8RC> {
H A DPPCFrameLowering.cpp2308 const TargetRegisterClass &G8RC = PPC::G8RCRegClass; in addScavengingSpillSlot() local
2309 const TargetRegisterClass &RC = Subtarget.isPPC64() ? G8RC : GPRC; in addScavengingSpillSlot()
H A DPPCISelLowering.cpp13562 const TargetRegisterClass *G8RC = &PPC::G8RCRegClass; in emitProbedAlloca() local
13568 Register FinalStackPtr = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13569 Register FramePointer = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13570 Register ActualNegSizeReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13601 Register ScratchReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13603 Register TempReg = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13616 Register Div = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13620 Register Mul = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13624 Register NegMod = MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
13662 MRI.createVirtualRegister(isPPC64 ? G8RC : GPRC); in emitProbedAlloca()
H A DPPCInstrVSX.td3352 (COPY_TO_REGCLASS (XSIEXPDP (COPY_TO_REGCLASS $A, G8RC), $B), F8RC)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBanks.td15 def GPRRegBank : RegisterBank<"GPR", [G8RC, G8RC_NOX0]>;