| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 98 DAG_FUNCTION(round, 1, 0, experimental_constrained_round, FROUND)
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| H A D | VPIntrinsics.def | 446 VP_PROPERTY_FUNCTIONAL_SDOPC(FROUND)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 991 FROUND, enumerator
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| H A D | BasicTTIImpl.h | 2061 ISD = ISD::FROUND; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 804 setOperationAction(ISD::FROUND, MVT::f16, Promote); in NVPTXTargetLowering()
805 setOperationAction(ISD::FROUND, MVT::v2f16, Expand); in NVPTXTargetLowering()
806 setOperationAction(ISD::FROUND, MVT::v2bf16, Expand); in NVPTXTargetLowering()
807 setOperationAction(ISD::FROUND, MVT::f32, Custom); in NVPTXTargetLowering()
808 setOperationAction(ISD::FROUND, MVT::f64, Custom); in NVPTXTargetLowering()
809 setOperationAction(ISD::FROUND, MVT::bf16, Promote); in NVPTXTargetLowering()
810 AddPromotedToType(ISD::FROUND, MVT::bf16, MVT::f32); in NVPTXTargetLowering()
2786 case ISD::FROUND: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.h | 128 FROUND, enumerator
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| H A D | RISCVInstrInfoF.td | 39 : SDNode<"RISCVISD::FROUND", SDT_RISCVFROUND>;
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| H A D | RISCVISelLowering.cpp | 447 ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
461 ISD::FTRUNC, ISD::FRINT, ISD::FROUND, in RISCVTargetLowering()
950 ISD::FFLOOR, ISD::FROUND, ISD::FROUNDEVEN, ISD::FRINT, in RISCVTargetLowering()
985 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
1374 setOperationAction({ISD::FTRUNC, ISD::FCEIL, ISD::FFLOOR, ISD::FROUND, in RISCVTargetLowering()
3024 case ISD::FROUND: in matchRoundingOp()
3035 // Expand vector FTRUNC, FCEIL, FFLOOR, FROUND, VP_FCEIL, VP_FFLOOR, VP_FROUND
3104 case ISD::FROUND: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND()
3273 return DAG.getNode(RISCVISD::FROUND, DL, VT, Src, MaxValNode, in lowerFTRUNC_FCEIL_FFLOOR_FROUND()
6769 case ISD::FROUND in LowerOperation()
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 239 case ISD::FROUND: return "fround"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 133 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1457 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
2615 case ISD::FROUND: in PromoteFloatResult()
3057 case ISD::FROUND: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 424 case ISD::FROUND: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 115 case ISD::FROUND: in ScalarizeVectorResult()
1200 case ISD::FROUND: in SplitVectorResult()
4545 case ISD::FROUND: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4636 case ISD::FROUND: in ConvertNodeToLibcall()
5536 case ISD::FROUND: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 6831 case Intrinsic::round: Opcode = ISD::FROUND; break; in visitIntrinsicCall()
9350 if (visitUnaryFloatCall(I, ISD::FROUND)) in visitCall()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 763 setOperationAction({ISD::FROUND, ISD::FPOWI, ISD::FLDEXP, ISD::FFREXP}, VT, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 463 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
468 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1031 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
1032 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
1037 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
1038 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
1239 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 770 ISD::FROUND, in AArch64TargetLowering()
815 setOperationPromotedToType(ISD::FROUND, V4Narrow, MVT::v4f32); in AArch64TargetLowering()
842 setOperationAction(ISD::FROUND, V8Narrow, Legal); in AArch64TargetLowering()
865 ISD::FRINT, ISD::FTRUNC, ISD::FROUND, in AArch64TargetLowering()
1193 ISD::FEXP10, ISD::FRINT, ISD::FROUND, in AArch64TargetLowering()
1350 ISD::FROUND, ISD::FROUNDEVEN, ISD::STRICT_FFLOOR, in AArch64TargetLowering()
1606 setOperationAction(ISD::FROUND, VT, Custom); in AArch64TargetLowering()
2071 setOperationAction(ISD::FROUND, VT, Default); in addTypeForFixedLengthSVE()
6831 case ISD::FROUND: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 523 setOperationAction(ISD::FROUND, VT, Legal); in SystemZTargetLowering()
583 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in SystemZTargetLowering()
624 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 164 case ISD::FROUND: in fp16SrcZerosHighBits()
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| H A D | AMDGPUISelLowering.cpp | 399 setOperationAction(ISD::FROUND, {MVT::f32, MVT::f64}, Custom); in AMDGPUTargetLowering()
1388 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
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| H A D | SIISelLowering.cpp | 216 ISD::FROUND, ISD::FROUNDEVEN, ISD::FFLOOR, ISD::FCANONICALIZE, in SITargetLowering()
600 ISD::FSIN, ISD::FROUND, ISD::FPTRUNC_ROUND}, in SITargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 544 def fround : SDNode<"ISD::FROUND" , SDTFPUnaryOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1506 // FLOG, FLOG2, FLOG10, FMAXNUM, FMINNUM, FNEARBYINT, FRINT, FROUND, TRAP, in HexagonTargetLowering()
1657 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 153 setOperationAction(ISD::FROUND, MVT::f16, Promote); in MipsSETargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 367 setOperationAction(ISD::FROUND, VT, Legal); in addMVEVectorTypes()
1513 setOperationAction(ISD::FROUND, MVT::f32, Legal); in ARMTargetLowering()
1529 setOperationAction(ISD::FROUND, MVT::f64, Legal); in ARMTargetLowering()
1555 setOperationAction(ISD::FROUND, MVT::f16, Legal); in ARMTargetLowering()
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