| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 95 DAG_FUNCTION(pow, 2, 1, experimental_constrained_pow, FPOW)
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| H A D | RuntimeLibcalls.td | 2170 def zos___FPOW_B : RuntimeLibcallImpl<POW_F32, "@@FPOW@B">;
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1015 FPOW, enumerator
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| H A D | BasicTTIImpl.h | 2367 ISD = ISD::FPOW; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 319 case ISD::FPOW: return "fpow"; in getOperationName()
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| H A D | LegalizeDAG.cpp | 4871 SDValue FPOW = in ConvertNodeToLibcall() local
4875 Results.push_back(FPOW); in ConvertNodeToLibcall()
4876 Results.push_back(FPOW.getValue(1)); in ConvertNodeToLibcall()
4881 Results.push_back(DAG.getNode(ISD::FPOW, SDLoc(Node), in ConvertNodeToLibcall()
4901 case ISD::FPOW: in ConvertNodeToLibcall()
5650 case ISD::FPOW: in PromoteNode()
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| H A D | LegalizeFloatTypes.cpp | 128 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break; in SoftenFloatResult()
1605 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break; in ExpandFloatResult()
2874 case ISD::FPOW: in PromoteFloatResult()
3358 case ISD::FPOW: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 427 case ISD::FPOW: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 177 case ISD::FPOW: in ScalarizeVectorResult()
1318 case ISD::FPOW: in SplitVectorResult()
4798 case ISD::FPOW: in WidenVectorResult()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1817 setOperationAction(ISD::FPOW , MVT::f128, Expand); in SparcTargetLowering()
1818 setOperationAction(ISD::FPOW , MVT::f64, Expand); in SparcTargetLowering()
1819 setOperationAction(ISD::FPOW , MVT::f32, Expand); in SparcTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYISelLowering.cpp | 120 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in CSKYTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaISelLowering.cpp | 221 setOperationAction(ISD::FPOW, VT, Expand); in XtensaTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1678 ISD::FPOW, ISD::FCOPYSIGN}) { in HexagonTargetLowering()
1724 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 462 setOperationAction(ISD::FPOW, MVT::f32, Expand); in MipsTargetLowering()
463 setOperationAction(ISD::FPOW, MVT::f64, Expand); in MipsTargetLowering()
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| H A D | MipsSEISelLowering.cpp | 181 setOperationAction(ISD::FPOW, MVT::f16, Promote); in MipsSETargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 411 setOperationAction(ISD::FPOW , MVT::f64, Expand); in PPCTargetLowering()
416 setOperationAction(ISD::FPOW , MVT::f32, Expand); in PPCTargetLowering()
423 setOperationAction(ISD::FPOW , MVT::f64, Custom); in PPCTargetLowering()
429 setOperationAction(ISD::FPOW , MVT::f32, Custom); in PPCTargetLowering()
889 setOperationAction(ISD::FPOW, VT, Expand); in PPCTargetLowering()
1209 setOperationAction(ISD::FPOW, MVT::f128, Expand); in PPCTargetLowering()
12543 case ISD::FPOW: return lowerPow(Op, DAG); in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 390 setOperationAction(ISD::FPOW, VT, Expand); in addMVEVectorTypes()
873 setOperationAction(ISD::FPOW, MVT::v2f64, Expand); in ARMTargetLowering()
896 setOperationAction(ISD::FPOW, MVT::v4f32, Expand); in ARMTargetLowering()
915 setOperationAction(ISD::FPOW, MVT::v2f32, Expand); in ARMTargetLowering()
1064 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1428 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1429 setOperationAction(ISD::FPOW, MVT::f32, Expand); in ARMTargetLowering()
1506 setOperationAction(ISD::FPOW, MVT::f16, Promote); in ARMTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 252 setOperationAction(ISD::FPOW, VT, Expand); in initSPUActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 394 setOperationAction({ISD::FCEIL, ISD::FPOW, ISD::FABS, ISD::FFLOOR, in AMDGPUTargetLowering()
547 ISD::FLOG, ISD::FLOG10, ISD::FPOW, in AMDGPUTargetLowering()
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| H A D | AMDGPUISelDAGToDAG.cpp | 149 case ISD::FPOW: in fp16SrcZerosHighBits()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 567 def fpow : SDNode<"ISD::FPOW" , SDTFPBinOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 137 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 205 setOperationAction(ISD::FPOW, MVT::f32, Expand); in LoongArchTargetLowering()
252 setOperationAction(ISD::FPOW, MVT::f64, Expand); in LoongArchTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 557 setOperationAction(ISD::FPOW, MVT::f128, Expand); in AArch64TargetLowering()
737 setOperationAction(ISD::FPOW, MVT::f32, Expand); in AArch64TargetLowering()
738 setOperationAction(ISD::FPOW, MVT::f64, Expand); in AArch64TargetLowering()
749 for (auto Op : {ISD::FREM, ISD::FPOW, ISD::FPOWI, in AArch64TargetLowering()
1241 ISD::FPOW, ISD::FLOG, ISD::FLOG2, in AArch64TargetLowering()
1718 setOperationAction(ISD::FPOW, VT, Expand); in AArch64TargetLowering()
2018 setOperationAction(ISD::FPOW, VT, Expand); in addTypeForNEON()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 467 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in RISCVTargetLowering()
536 setOperationAction({ISD::FREM, ISD::FPOW, ISD::FPOWI, in RISCVTargetLowering()
774 ISD::FREM, ISD::FPOW, ISD::FCOS, ISD::FSIN, ISD::FSINCOS, ISD::FEXP, in RISCVTargetLowering()
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