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Searched refs:FPOW (Results 1 – 25 of 29) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DConstrainedOps.def94 DAG_FUNCTION(pow, 2, 1, experimental_constrained_pow, FPOW)
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h971 FPOW, enumerator
H A DBasicTTIImpl.h2067 ISD = ISD::FPOW; in getTypeBasedIntrinsicInstrCost()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp302 case ISD::FPOW: return "fpow"; in getOperationName()
H A DLegalizeDAG.cpp4672 SDValue FPOW = in ConvertNodeToLibcall() local
4676 Results.push_back(FPOW); in ConvertNodeToLibcall()
4677 Results.push_back(FPOW.getValue(1)); in ConvertNodeToLibcall()
4682 Results.push_back(DAG.getNode(ISD::FPOW, SDLoc(Node), in ConvertNodeToLibcall()
4702 case ISD::FPOW: in ConvertNodeToLibcall()
5438 case ISD::FPOW: in PromoteNode()
H A DLegalizeFloatTypes.cpp122 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break; in SoftenFloatResult()
1448 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break; in ExpandFloatResult()
2635 case ISD::FPOW: in PromoteFloatResult()
3075 case ISD::FPOW: in SoftPromoteHalfResult()
H A DLegalizeVectorOps.cpp413 case ISD::FPOW: in LegalizeOp()
H A DLegalizeVectorTypes.cpp166 case ISD::FPOW: in ScalarizeVectorResult()
1260 case ISD::FPOW: in SplitVectorResult()
4430 case ISD::FPOW: in WidenVectorResult()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1823 setOperationAction(ISD::FPOW , MVT::f128, Expand); in SparcTargetLowering()
1824 setOperationAction(ISD::FPOW , MVT::f64, Expand); in SparcTargetLowering()
1825 setOperationAction(ISD::FPOW , MVT::f32, Expand); in SparcTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp120 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in CSKYTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1610 ISD::FPOW, ISD::FCOPYSIGN}) { in HexagonTargetLowering()
1655 ISD::FCOS, ISD::FPOW, ISD::FLOG, ISD::FLOG2, in HexagonTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp403 setOperationAction(ISD::FPOW , MVT::f64, Expand); in PPCTargetLowering()
408 setOperationAction(ISD::FPOW , MVT::f32, Expand); in PPCTargetLowering()
415 setOperationAction(ISD::FPOW , MVT::f64, Custom); in PPCTargetLowering()
421 setOperationAction(ISD::FPOW , MVT::f32, Custom); in PPCTargetLowering()
880 setOperationAction(ISD::FPOW, VT, Expand); in PPCTargetLowering()
1192 setOperationAction(ISD::FPOW, MVT::f128, Expand); in PPCTargetLowering()
11796 case ISD::FPOW: return lowerPow(Op, DAG); in LowerOperation()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp454 setOperationAction(ISD::FPOW, MVT::f32, Expand); in MipsTargetLowering()
455 setOperationAction(ISD::FPOW, MVT::f64, Expand); in MipsTargetLowering()
H A DMipsSEISelLowering.cpp142 setOperationAction(ISD::FPOW, MVT::f16, Promote); in MipsSETargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp380 setOperationAction(ISD::FPOW, VT, Expand); in addMVEVectorTypes()
883 setOperationAction(ISD::FPOW, MVT::v2f64, Expand); in ARMTargetLowering()
906 setOperationAction(ISD::FPOW, MVT::v4f32, Expand); in ARMTargetLowering()
924 setOperationAction(ISD::FPOW, MVT::v2f32, Expand); in ARMTargetLowering()
1066 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1471 setOperationAction(ISD::FPOW, MVT::f64, Expand); in ARMTargetLowering()
1472 setOperationAction(ISD::FPOW, MVT::f32, Expand); in ARMTargetLowering()
1547 setOperationAction(ISD::FPOW, MVT::f16, Promote); in ARMTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp132 {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, ISD::FMA}) in WebAssemblyTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchISelLowering.cpp181 setOperationAction(ISD::FPOW, MVT::f32, Expand); in LoongArchTargetLowering()
218 setOperationAction(ISD::FPOW, MVT::f64, Expand); in LoongArchTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp252 setOperationAction(ISD::FPOW, VT, Expand); in initSPUActions()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp153 case ISD::FPOW: in fp16SrcZerosHighBits()
H A DAMDGPUISelLowering.cpp394 setOperationAction({ISD::FCEIL, ISD::FPOW, ISD::FABS, ISD::FFLOOR, in AMDGPUTargetLowering()
534 ISD::FLOG, ISD::FLOG10, ISD::FPOW, in AMDGPUTargetLowering()
H A DSIISelLowering.cpp212 ISD::FSIN, ISD::FCOS, ISD::FPOW, ISD::FPOWI, in SITargetLowering()
475 setOperationAction({ISD::FPOW, ISD::FPOWI}, MVT::f16, Promote); in SITargetLowering()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td536 def fpow : SDNode<"ISD::FPOW" , SDTFPBinOp>;
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp543 setOperationAction(ISD::FPOW, MVT::f128, Expand); in AArch64TargetLowering()
723 setOperationAction(ISD::FPOW, MVT::f32, Expand); in AArch64TargetLowering()
724 setOperationAction(ISD::FPOW, MVT::f64, Expand); in AArch64TargetLowering()
735 for (auto Op : {ISD::FREM, ISD::FPOW, ISD::FPOWI, in AArch64TargetLowering()
1191 ISD::FPOW, ISD::FLOG, ISD::FLOG2, in AArch64TargetLowering()
1624 setOperationAction(ISD::FPOW, VT, Expand); in AArch64TargetLowering()
1849 setOperationAction(ISD::FPOW, VT, Expand); in addTypeForNEON()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp443 ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, in RISCVTargetLowering()
505 setOperationAction({ISD::FREM, ISD::FPOW, ISD::FPOWI, in RISCVTargetLowering()
994 setOperationAction(ISD::FPOW, VT, Expand); in RISCVTargetLowering()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp615 setOperationAction(ISD::FPOW, VT, Action); in X86TargetLowering()
938 setOperationAction(ISD::FPOW , MVT::f32 , Expand); in X86TargetLowering()
939 setOperationAction(ISD::FPOW , MVT::f64 , Expand); in X86TargetLowering()
940 setOperationAction(ISD::FPOW , MVT::f80 , Expand); in X86TargetLowering()
941 setOperationAction(ISD::FPOW , MVT::f128 , Expand); in X86TargetLowering()
963 setOperationAction(ISD::FPOW, VT, Expand); in X86TargetLowering()
2489 ISD::FPOW, ISD::STRICT_FPOW, in X86TargetLowering()

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