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Searched refs:FNMSUB (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstComments.cpp349 CASE_FMA4_PACKED_RR(FNMSUB) in printFMAComments()
350 CASE_FMA4_SCALAR_RR(FNMSUB) in printFMAComments()
353 CASE_FMA4_PACKED_RM(FNMSUB) in printFMAComments()
354 CASE_FMA4_SCALAR_RM(FNMSUB) in printFMAComments()
360 CASE_FMA4_PACKED_MR(FNMSUB) in printFMAComments()
361 CASE_FMA4_SCALAR_MR(FNMSUB) in printFMAComments()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCSchedPredicates.td59 FNMSUB,
H A DPPCISelLowering.h168 FNMSUB, enumerator
H A DP10InstrResources.td210 FNMSUB,
H A DP9InstrResources.td427 FNMSUB,
H A DPPCISelLowering.cpp1818 case PPCISD::FNMSUB: return "PPCISD::FNMSUB"; in getTargetNodeName()
11066 return DAG.getNode(PPCISD::FNMSUB, dl, VT, Op.getOperand(1), in LowerINTRINSIC_WO_CHAIN()
15818 case PPCISD::FNMSUB: in PerformDAGCombine()
17634 return PPCISD::FNMSUB; in invertFMAOpcode()
17635 case PPCISD::FNMSUB: in invertFMAOpcode()
17652 case PPCISD::FNMSUB: in getNegatedExpression()
H A DPPCInstrInfo.td250 def PPCfnmsub : SDNode<"PPCISD::FNMSUB" , SDTFPTernaryOp>;
3008 defm FNMSUB : AForm_1r<63, 30,
3412 (FNMSUB $A, $B, $C)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2064 : RISCVMachineCombinerPattern::FNMSUB); in getFPFusedMultiplyPatterns()
2160 case RISCVMachineCombinerPattern::FNMSUB: in getCombinerObjective()
2211 case RISCVMachineCombinerPattern::FNMSUB: in getAddendOperandIdx()
2338 case RISCVMachineCombinerPattern::FNMSUB: { in genAlternativeCodeSequence()
3179 case CASE_VFMA_SPLATS(FNMSUB): in findCommutedOpIndices()
3209 case CASE_VFMA_OPCODE_VV(FNMSUB): in findCommutedOpIndices()
3379 case CASE_VFMA_SPLATS(FNMSUB): in commuteInstructionImpl()
3404 CASE_VFMA_CHANGE_OPCODE_SPLATS(FNMSAC, FNMSUB) in commuteInstructionImpl()
3405 CASE_VFMA_CHANGE_OPCODE_SPLATS(FNMSUB, FNMSAC) in commuteInstructionImpl()
3409 CASE_VFMA_CHANGE_OPCODE_VV(FNMSAC, FNMSUB) in commuteInstructionImpl()
[all...]
H A DRISCVInstrInfo.h57 FNMSUB, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h558 FNMSUB, enumerator
H A DX86InstrFragmentsSIMD.td550 def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
H A DX86ISelLowering.cpp33902 NODE_NAME_CASE(FNMSUB) in getTargetNodeName()
52778 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
52784 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
52801 case X86ISD::FNMADD: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
52804 case X86ISD::FNMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
52820 case ISD::FMA: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
52826 case X86ISD::FNMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
52859 SDValue NewNode = DAG.getNode(X86ISD::FNMSUB, DL, VT, Arg.getOperand(0), in combineFneg()
52892 case X86ISD::FNMSUB: in getNegatedExpression()
57903 case X86ISD::FNMSUB: in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX2T99.td1184 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64SchedThunderX3T110.td1292 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64InstrInfo.td5061 defm FNMSUB : ThreeOperandFPData<1, 1, "fnmsub",