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Searched refs:FMSUB (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfo.cpp2058 : RISCVMachineCombinerPattern::FMSUB); in getFPFusedMultiplyPatterns()
2159 case RISCVMachineCombinerPattern::FMSUB: in getCombinerObjective()
2192 return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_H in getFPFusedMultiplyOpcode()
2195 return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_S in getFPFusedMultiplyOpcode()
2198 return Pattern == RISCVMachineCombinerPattern::FMSUB ? RISCV::FMSUB_D in getFPFusedMultiplyOpcode()
2208 case RISCVMachineCombinerPattern::FMSUB: in getAddendOperandIdx()
2332 case RISCVMachineCombinerPattern::FMSUB: { in genAlternativeCodeSequence()
3175 case CASE_VFMA_SPLATS(FMSUB): in findCommutedOpIndices()
3207 case CASE_VFMA_OPCODE_VV(FMSUB): in findCommutedOpIndices()
3375 case CASE_VFMA_SPLATS(FMSUB) in commuteInstructionImpl()
[all...]
H A DRISCVInstrInfo.h56 FMSUB, enumerator
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86InstComments.cpp315 CASE_FMA4_PACKED_RR(FMSUB) in printFMAComments()
316 CASE_FMA4_SCALAR_RR(FMSUB) in printFMAComments()
319 CASE_FMA4_PACKED_RM(FMSUB) in printFMAComments()
320 CASE_FMA4_SCALAR_RM(FMSUB) in printFMAComments()
325 CASE_FMA4_PACKED_MR(FMSUB) in printFMAComments()
326 CASE_FMA4_SCALAR_MR(FMSUB) in printFMAComments()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCSchedPredicates.td47 FMSUB,
H A DP10InstrResources.td206 FMSUB,
H A DP9InstrResources.td417 (instregex "FMSUB(S)?$"),
H A DPPCInstrInfo.td2988 defm FMSUB : AForm_1r<63, 28,
3416 (FMSUB $A, $B, $C)>;
3432 def : Pat<(int_ppc_fmsub f64:$A, f64:$B, f64:$C), (FMSUB $A, $B, $C)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h557 FMSUB, enumerator
H A DX86InstrFragmentsSIMD.td545 def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFPTernaryOp, [SDNPCommutative]>;
H A DX86ISelLowering.cpp33898 NODE_NAME_CASE(FMSUB) in getTargetNodeName()
41612 if (FMSub.getOpcode() != X86ISD::FMSUB) in combineShuffleToFMAddSub()
41615 if (FMAdd.getOpcode() != ISD::FMA || FMSub.getOpcode() != X86ISD::FMSUB || in combineShuffleToFMAddSub()
52778 case X86ISD::FMSUB: Opcode = X86ISD::FNMSUB; break; in negateFMAOpcode()
52784 case X86ISD::FNMSUB: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
52795 case ISD::FMA: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
52798 case X86ISD::FMSUB: Opcode = ISD::FMA; break; in negateFMAOpcode()
52822 case X86ISD::FMSUB: Opcode = X86ISD::FNMADD; break; in negateFMAOpcode()
52824 case X86ISD::FNMADD: Opcode = X86ISD::FMSUB; break; in negateFMAOpcode()
52890 case X86ISD::FMSUB: in getNegatedExpression()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedThunderX2T99.td1184 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64SchedThunderX3T110.td1292 (instregex "^FMADD", "^FMSUB", "^FNMADD", "^FNMSUB")>;
H A DAArch64InstrInfo.td5057 defm FMSUB : ThreeOperandFPData<0, 1, "fmsub",
5067 // N.b. FMSUB etc have the accumulator at the *end* of (outs), unlike